Searched refs:E_DMD_T2_BW (Results 1 – 14 of 14) sorted by relevance
| /utopia/UTPA2-700.0.x/mxlib/include/ |
| H A D | drvDMD_INTERN_DVBT2.h | 219 E_DMD_T2_BW = 0x40, enumerator
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 282 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1358 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 293 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1401 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 302 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1410 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 307 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1432 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 312 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1445 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 312 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
1445 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/projects/build/ |
| H A D | preprocess.txt | 24175 E_DMD_T2_BW = 0x40,
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