Searched refs:CFG_23_PVR4_LPCR1_RLD (Results 1 – 11 of 11) sorted by relevance
1466 …#define CFG_23_PVR4_LPCR1_RLD 0x8000 //set 1 to read … macro
1505 …#define CFG_23_PVR4_LPCR1_RLD 0x8000 //set 1 to read … macro
359 REG16_SET((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_TSP_HwPatch()5475 REG16_CLR((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()5479 REG16_SET((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
1507 …#define CFG_23_PVR4_LPCR1_RLD 0x8000 //set 1 to read … macro
1563 …#define CFG_23_PVR4_LPCR1_RLD 0x8000 //set 1 to read … macro
1525 …#define CFG_23_PVR4_LPCR1_RLD 0x8000 //set 1 to read … macro
1585 …#define CFG_23_PVR4_LPCR1_RLD 0x8000 //set 1 to read … macro
357 REG16_SET((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_TSP_HwPatch()5990 REG16_CLR((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()5994 REG16_SET((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
280 REG16_SET((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_TSP_HwPatch()5619 REG16_CLR((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()5623 REG16_SET((&_RegCtrl2->CFG_23), CFG_23_PVR4_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()