Home
last modified time | relevance | path

Searched refs:CFG_1D_1E_PVR3_STR2MI_HEAD2 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h1444 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h1483 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
H A DhalTSP.c4955 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetBuf()
5010 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (u32StartAddr1>>MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetStr2Miu_StartAddr()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h1485 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h1541 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h1503 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h1503 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h1563 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
H A DhalTSP.c5465 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetBuf()
5520 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (u32StartAddr1>>MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetStr2Miu_StartAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h1503 …#define CFG_1D_1E_PVR3_STR2MI_HEAD2 0xffffffff //[31:27] : … macro
H A DhalTSP.c5128 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetBuf()
5183 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (u32StartAddr1>>MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetStr2Miu_StartAddr()