Searched refs:CFG_19_1A_PVR3_STR2MI_MID (Results 1 – 11 of 11) sorted by relevance
1440 …#define CFG_19_1A_PVR3_STR2MI_MID 0xffffffff //[31:27] : … macro
1479 …#define CFG_19_1A_PVR3_STR2MI_MID 0xffffffff //[31:27] : … macro
4952 … REG32_W(&(_RegCtrl2->CFG_19_1A), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetBuf()5064 REG32_W(&(_RegCtrl2->CFG_19_1A), (u32MidAddr0>>4) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetStr2Miu_MidAddr()
1481 …#define CFG_19_1A_PVR3_STR2MI_MID 0xffffffff //[31:27] : … macro
1537 …#define CFG_19_1A_PVR3_STR2MI_MID 0xffffffff //[31:27] : … macro
1499 …#define CFG_19_1A_PVR3_STR2MI_MID 0xffffffff //[31:27] : … macro
1559 …#define CFG_19_1A_PVR3_STR2MI_MID 0xffffffff //[31:27] : … macro
5462 … REG32_W(&(_RegCtrl2->CFG_19_1A), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetBuf()5575 REG32_W(&(_RegCtrl2->CFG_19_1A), (u32MidAddr0>>4) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetStr2Miu_MidAddr()
5125 … REG32_W(&(_RegCtrl2->CFG_19_1A), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetBuf()5217 REG32_W(&(_RegCtrl2->CFG_19_1A), (u32MidAddr0>>4) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetStr2Miu_MidAddr()