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Searched refs:CFG_16_PVR3_STR2MI_RST_WADR (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c4688 REG16_SET(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Exit()
4689 REG16_CLR(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Exit()
4736 REG16_SET(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Start()
4737 REG16_CLR(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Start()
H A DregTSP.h1462 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c4874 REG16_SET(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Exit()
4875 REG16_CLR(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Exit()
4917 REG16_SET(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Start()
4918 REG16_CLR(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Start()
H A DregTSP.h1482 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c5199 REG16_SET(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Exit()
5200 REG16_CLR(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Exit()
5247 REG16_SET(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Start()
5248 REG16_CLR(&(_RegCtrl2->CFG_16), CFG_16_PVR3_STR2MI_RST_WADR); in HAL_PVR_Start()
H A DregTSP.h1542 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h1423 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h1464 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h1520 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h1482 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h1482 …#define CFG_16_PVR3_STR2MI_RST_WADR 0x0004 //set 1 to reset… macro