Home
last modified time | relevance | path

Searched refs:CFG5_7D_DIS_PKT_CNT_AD_CLR (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c5143 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
5144 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
6315 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
6316 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
H A DregTSP.h2089 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c6506 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
6507 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
7882 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
7883 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
H A DregTSP.h2127 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c6680 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
6681 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
8071 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
8072 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
H A DregTSP.h2223 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c7052 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
7053 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_DisPKTCnt_Clear()
8496 REG16_SET(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
8497 REG16_CLR(&_RegCtrl5->CFG5_7D,CFG5_7D_DIS_PKT_CNT_AD_CLR); in HAL_TSP_Debug_DisPktCnt_Clear()
H A DregTSP.h2297 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h2129 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h2244 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h2223 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h2223 #define CFG5_7D_DIS_PKT_CNT_AD_CLR 0x0800 macro