Searched refs:CFG5_77_PIDFLT_SRC_SEL2_SHIFT (Results 1 – 12 of 12) sorted by relevance
2029 #define CFG5_77_PIDFLT_SRC_SEL2_SHIFT 0 //pkt dmx 2 macro
6126 …MSK_W(&_RegCtrl5->CFG5_77,CFG5_77_PIDFLT_SRC_SEL2_MASK,(u16AvType<<CFG5_77_PIDFLT_SRC_SEL2_SHIFT)); in HAL_TSP_Debug_DropDisPktCnt_Src()
2067 #define CFG5_77_PIDFLT_SRC_SEL2_SHIFT 0 //pkt dmx 2 macro
7668 …MSK_W(&_RegCtrl5->CFG5_77,CFG5_77_PIDFLT_SRC_SEL2_MASK,(u16AvType<<CFG5_77_PIDFLT_SRC_SEL2_SHIFT)); in HAL_TSP_Debug_DropDisPktCnt_Src()
2069 #define CFG5_77_PIDFLT_SRC_SEL2_SHIFT 0 //pkt dmx 2 macro
2183 #define CFG5_77_PIDFLT_SRC_SEL2_SHIFT 0 //pkt dmx 2 macro
2162 #define CFG5_77_PIDFLT_SRC_SEL2_SHIFT 0 //pkt dmx 2 macro
2236 #define CFG5_77_PIDFLT_SRC_SEL2_SHIFT 0 //pkt dmx 2 macro
8232 …MSK_W(&_RegCtrl5->CFG5_77,CFG5_77_PIDFLT_SRC_SEL2_MASK,(u16AvType<<CFG5_77_PIDFLT_SRC_SEL2_SHIFT)); in HAL_TSP_Debug_DropDisPktCnt_Src()
7847 …MSK_W(&_RegCtrl5->CFG5_77,CFG5_77_PIDFLT_SRC_SEL2_MASK,(u16AvType<<CFG5_77_PIDFLT_SRC_SEL2_SHIFT)); in HAL_TSP_Debug_DropDisPktCnt_Src()