Searched refs:wFrameWidthInMbsMinus1 (Results 1 – 9 of 9) sorted by relevance
| /rockchip-linux_mpp/mpp/common/ |
| H A D | h264d_syntax.h | 40 RK_U16 wFrameWidthInMbsMinus1; member
281 RK_U16 wFrameWidthInMbsMinus1; member
327 RK_U16 wFrameWidthInMbsMinus1; member
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| /rockchip-linux_mpp/mpp/codec/dec/h264/ |
| H A D | h264d_fill.c | 134 pp->wFrameWidthInMbsMinus1 = p_Vid->active_sps->pic_width_in_mbs_minus1; in fill_picparams()
394 * (dxva_ctx->pp.wFrameWidthInMbsMinus1 + 1); in commit_buffer()
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| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_vdpu1.c | 341 p_regs->SwReg04.sw_pic_mb_width = p_hal->pp->wFrameWidthInMbsMinus1 + 1; in vdpu1_set_pic_regs()
606 mpp_dev_set_reg_offset(p_hal->dev, 13, ((pp->wFrameWidthInMbsMinus1 + 1) * 16)); in vdpu1_set_asic_regs()
618 picSizeInMbs = p_hal->pp->wFrameWidthInMbsMinus1 + 1; in vdpu1_set_asic_regs()
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| H A D | hal_h264d_vdpu2.c | 384 p_regs->sw110.pic_mb_w = p_hal->pp->wFrameWidthInMbsMinus1 + 1; in set_pic_regs()
721 mpp_dev_set_reg_offset(p_hal->dev, 63, ((pp->wFrameWidthInMbsMinus1 + 1) * 16)); in set_asic_regs()
731 picSizeInMbs = p_hal->pp->wFrameWidthInMbsMinus1 + 1; in set_asic_regs()
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| H A D | hal_h264d_vdpu34x.c | 375 mpp_put_bits(&bp, (pp->wFrameWidthInMbsMinus1 + 1), 12); in prepare_spspps()
853 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in hal_h264d_rcb_info_update()
926 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in vdpu34x_h264d_gen_regs()
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| H A D | hal_h264d_vdpu384a.c | 161 pic_width = 16 * (pp->wFrameWidthInMbsMinus1 + 1); in prepare_spspps()
732 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in hal_h264d_rcb_info_update()
768 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in vdpu384a_h264d_gen_regs()
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| H A D | hal_h264d_vdpu383.c | 174 pic_width = 16 * (pp->wFrameWidthInMbsMinus1 + 1); in prepare_spspps()
781 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in hal_h264d_rcb_info_update()
816 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in vdpu383_h264d_gen_regs()
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| H A D | hal_h264d_vdpu382.c | 381 mpp_put_bits(&bp, (pp->wFrameWidthInMbsMinus1 + 1), 12); in prepare_spspps()
891 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in hal_h264d_rcb_info_update()
925 RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64); in vdpu382_h264d_setup_colmv_buf()
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| H A D | hal_h264d_rkv_reg.c | 274 mpp_put_bits(&bp, (pp->wFrameWidthInMbsMinus1 + 1), 9); in prepare_spspps()
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