| /rockchip-linux_mpp/mpp/hal/rkenc/h264e/ |
| H A D | hal_h264e_vepu540c.c | 1111 regs->reg_base.sli_splt.sli_splt = 0; in setup_vepu540c_split()
1112 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu540c_split()
1113 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu540c_split()
1114 regs->reg_base.sli_splt.sli_max_num_m1 = 0; in setup_vepu540c_split()
1115 regs->reg_base.sli_splt.sli_flsh = 0; in setup_vepu540c_split()
1122 regs->reg_base.sli_splt.sli_splt = 1; in setup_vepu540c_split()
1123 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu540c_split()
1124 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu540c_split()
1125 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu540c_split()
1126 regs->reg_base.sli_splt.sli_flsh = 1; in setup_vepu540c_split()
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| H A D | hal_h264e_vepu580.c | 847 regs->reg_base.sli_splt.sli_splt = 0; in vepu580_h264e_save_pass1_patch()
1678 regs->reg_base.sli_splt.sli_splt = 0; in setup_vepu580_split()
1679 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu580_split()
1680 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu580_split()
1681 regs->reg_base.sli_splt.sli_max_num_m1 = 0; in setup_vepu580_split()
1682 regs->reg_base.sli_splt.sli_flsh = 0; in setup_vepu580_split()
1689 regs->reg_base.sli_splt.sli_splt = 1; in setup_vepu580_split()
1690 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu580_split()
1691 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu580_split()
1692 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu580_split()
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| H A D | hal_h264e_vepu510.c | 868 reg_frm->common.sli_splt.sli_splt = 0; in vepu510_h264e_save_pass1_patch()
1552 reg_frm->common.sli_splt.sli_splt = 0; in setup_vepu510_split()
1553 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1554 reg_frm->common.sli_splt.sli_splt_cpst = 0; in setup_vepu510_split()
1555 reg_frm->common.sli_splt.sli_max_num_m1 = 0; in setup_vepu510_split()
1556 reg_frm->common.sli_splt.sli_flsh = 0; in setup_vepu510_split()
1563 reg_frm->common.sli_splt.sli_splt = 1; in setup_vepu510_split()
1564 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1565 reg_frm->common.sli_splt.sli_splt_cpst = 0; in setup_vepu510_split()
1566 reg_frm->common.sli_splt.sli_max_num_m1 = 500; in setup_vepu510_split()
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| H A D | hal_h264e_vepu511.c | 840 reg_frm->common.sli_splt.sli_splt = 0; in vepu511_h264e_save_pass1_patch()
1552 reg_frm->common.sli_splt.sli_splt = 0; in setup_vepu511_split()
1553 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu511_split()
1554 reg_frm->common.sli_splt.sli_splt_cpst = 0; in setup_vepu511_split()
1555 reg_frm->common.sli_splt.sli_max_num_m1 = 0; in setup_vepu511_split()
1556 reg_frm->common.sli_splt.sli_flsh = 0; in setup_vepu511_split()
1563 reg_frm->common.sli_splt.sli_splt = 1; in setup_vepu511_split()
1564 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu511_split()
1565 reg_frm->common.sli_splt.sli_splt_cpst = 0; in setup_vepu511_split()
1566 reg_frm->common.sli_splt.sli_max_num_m1 = 500; in setup_vepu511_split()
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| H A D | hal_h264e_vepu540c_reg.h | 507 RK_U32 sli_splt : 1; member
514 } sli_splt; member
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| H A D | hal_h264e_vepu541.c | 1179 regs->reg087.sli_splt = 0; in setup_vepu541_split()
1190 regs->reg087.sli_splt = 1; in setup_vepu541_split()
1201 regs->reg087.sli_splt = 1; in setup_vepu541_split()
1225 regs->reg087.sli_splt = 1; in setup_vepu540_force_slice_split()
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| H A D | hal_h264e_vepu541_reg.h | 1344 RK_U32 sli_splt : 1; member
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| H A D | hal_h264e_vepu580_reg.h | 474 RK_U32 sli_splt : 1; member
481 } sli_splt; member
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| /rockchip-linux_mpp/mpp/hal/rkenc/h265e/ |
| H A D | hal_h265e_vepu510.c | 1711 reg_frm->common.sli_splt.sli_splt = 0; in vepu510_h265e_save_pass1_patch()
1823 regs->reg_frm.common.sli_splt.sli_splt = 0; in setup_vepu510_split()
1824 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1825 regs->reg_frm.common.sli_splt.sli_splt_cpst = 0; in setup_vepu510_split()
1826 regs->reg_frm.common.sli_splt.sli_max_num_m1 = 0; in setup_vepu510_split()
1827 regs->reg_frm.common.sli_splt.sli_flsh = 0; in setup_vepu510_split()
1834 regs->reg_frm.common.sli_splt.sli_splt = 1; in setup_vepu510_split()
1835 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1836 regs->reg_frm.common.sli_splt.sli_splt_cpst = 0; in setup_vepu510_split()
1837 regs->reg_frm.common.sli_splt.sli_max_num_m1 = 500; in setup_vepu510_split()
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| H A D | hal_h265e_vepu511.c | 688 reg_frm->common.sli_splt.sli_splt = 0; in vepu511_h265e_save_pass1_patch()
951 regs->reg_frm.common.sli_splt.sli_splt = 0; in vepu511_h265_set_split()
952 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in vepu511_h265_set_split()
953 regs->reg_frm.common.sli_splt.sli_splt_cpst = 0; in vepu511_h265_set_split()
954 regs->reg_frm.common.sli_splt.sli_max_num_m1 = 0; in vepu511_h265_set_split()
955 regs->reg_frm.common.sli_splt.sli_flsh = 0; in vepu511_h265_set_split()
962 regs->reg_frm.common.sli_splt.sli_splt = 1; in vepu511_h265_set_split()
963 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in vepu511_h265_set_split()
964 regs->reg_frm.common.sli_splt.sli_splt_cpst = 0; in vepu511_h265_set_split()
965 regs->reg_frm.common.sli_splt.sli_max_num_m1 = 500; in vepu511_h265_set_split()
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| H A D | hal_h265e_vepu541_reg.h | 558 RK_U32 sli_splt : 1; member
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| H A D | hal_h265e_vepu540c_reg.h | 595 RK_U32 sli_splt : 1; member
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| H A D | hal_h265e_vepu540c.c | 1138 regs->reg_base.reg0216_sli_splt.sli_splt = 0; in vepu540c_h265_set_split()
1149 regs->reg_base.reg0216_sli_splt.sli_splt = 1; in vepu540c_h265_set_split()
1170 regs->reg_base.reg0216_sli_splt.sli_splt = 1; in vepu540c_h265_set_split()
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| H A D | hal_h265e_vepu541.c | 1461 regs->sli_spl.sli_splt = 0; in setup_vepu541_split()
1472 regs->sli_spl.sli_splt = 1; in setup_vepu541_split()
1483 regs->sli_spl.sli_splt = 1; in setup_vepu541_split()
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| H A D | hal_h265e_vepu580.c | 2565 regs->reg_base.reg0216_sli_splt.sli_splt = 0; in vepu580_h265e_save_pass1_patch()
2619 regs->reg_base.reg0216_sli_splt.sli_splt = 0; in vepu580_setup_split()
2630 regs->reg_base.reg0216_sli_splt.sli_splt = 1; in vepu580_setup_split()
2651 regs->reg_base.reg0216_sli_splt.sli_splt = 1; in vepu580_setup_split()
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| H A D | hal_h265e_vepu580_reg.h | 467 RK_U32 sli_splt : 1; member
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| /rockchip-linux_mpp/mpp/common/ |
| H A D | h265e_syntax_new.h | 127 RK_U32 sli_splt : 1; member
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| /rockchip-linux_mpp/mpp/codec/enc/h265/ |
| H A D | h265e_syntax.c | 154 sp->sli_splt = 1; in fill_slice_parameters()
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| /rockchip-linux_mpp/mpp/hal/rkenc/jpege/ |
| H A D | hal_jpege_vepu540c_reg.h | 588 RK_U32 sli_splt : 1; member
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| /rockchip-linux_mpp/mpp/hal/rkenc/common/ |
| H A D | vepu510_common.h | 661 RK_U32 sli_splt : 1; member
668 } sli_splt; member
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| H A D | vepu511_common.h | 1006 RK_U32 sli_splt : 1; member
1013 } sli_splt; member
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