Lines Matching refs:sli_splt
1111 regs->reg_base.sli_splt.sli_splt = 0; in setup_vepu540c_split()
1112 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu540c_split()
1113 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu540c_split()
1114 regs->reg_base.sli_splt.sli_max_num_m1 = 0; in setup_vepu540c_split()
1115 regs->reg_base.sli_splt.sli_flsh = 0; in setup_vepu540c_split()
1122 regs->reg_base.sli_splt.sli_splt = 1; in setup_vepu540c_split()
1123 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu540c_split()
1124 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu540c_split()
1125 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu540c_split()
1126 regs->reg_base.sli_splt.sli_flsh = 1; in setup_vepu540c_split()
1139 regs->reg_base.sli_splt.sli_splt = 1; in setup_vepu540c_split()
1140 regs->reg_base.sli_splt.sli_splt_mode = 1; in setup_vepu540c_split()
1141 regs->reg_base.sli_splt.sli_splt_cpst = 0; in setup_vepu540c_split()
1142 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu540c_split()
1143 regs->reg_base.sli_splt.sli_flsh = 1; in setup_vepu540c_split()