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Searched refs:reg100 (Results 1 – 16 of 16) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/inc/
H A Dvdpu382_avs2d.h81 } reg100; member
H A Dvdpu34x_avs2d.h81 } reg100; member
H A Dvdpu34x_h264d.h95 } reg100; member
H A Dvdpu34x_vp9d.h178 } reg100; member
H A Dvdpu382_h264d.h95 } reg100; member
H A Dvdpu382_vp9d.h178 } reg100; member
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu34x.c72 case 4: regs.reg100.ref4_##field = value; break;\
73 case 5: regs.reg100.ref5_##field = value; break;\
74 case 6: regs.reg100.ref6_##field = value; break;\
75 case 7: regs.reg100.ref7_##field = value; break;\
H A Dhal_h264d_vdpu384a.c48 case 4: regs.reg100.ref4_##field = value; break;\
49 case 5: regs.reg100.ref5_##field = value; break;\
50 case 6: regs.reg100.ref6_##field = value; break;\
51 case 7: regs.reg100.ref7_##field = value; break;\
H A Dhal_h264d_vdpu383.c57 case 4: regs.reg100.ref4_##field = value; break;\
58 case 5: regs.reg100.ref5_##field = value; break;\
59 case 6: regs.reg100.ref6_##field = value; break;\
60 case 7: regs.reg100.ref7_##field = value; break;\
H A Dhal_h264d_vdpu382.c74 case 4: regs.reg100.ref4_##field = value; break;\
75 case 5: regs.reg100.ref5_##field = value; break;\
76 case 6: regs.reg100.ref6_##field = value; break;\
77 case 7: regs.reg100.ref7_##field = value; break;\
/rockchip-linux_mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_vdpu34x.c523 vp9_hw_regs->vp9d_param.reg100.segid_ref_poc = hw_ctx->segid_ref_poc; in hal_vp9d_vdpu34x_gen_regs()
541 vp9_hw_regs->vp9d_param.reg100.segid_ref_poc = 0; in hal_vp9d_vdpu34x_gen_regs()
H A Dhal_vp9d_vdpu382.c537 vp9_hw_regs->vp9d_param.reg100.segid_ref_poc = hw_ctx->segid_ref_poc; in hal_vp9d_vdpu382_gen_regs()
555 vp9_hw_regs->vp9d_param.reg100.segid_ref_poc = 0; in hal_vp9d_vdpu382_gen_regs()
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp2.c834 dst_reg->sharp.reg100.sw_peaking_gain = p_shp_param->peaking_gain; in set_shp_to_vdpp2_reg()
835 dst_reg->sharp.reg100.sw_nondir_thr = p_shp_param->peaking_edge_ctrl_non_dir_thr; in set_shp_to_vdpp2_reg()
836 dst_reg->sharp.reg100.sw_dir_cmp_ratio = p_shp_param->peaking_edge_ctrl_dir_cmp_ratio; in set_shp_to_vdpp2_reg()
837 dst_reg->sharp.reg100.sw_nondir_wgt_ratio = p_shp_param->peaking_edge_ctrl_non_dir_wgt_ratio; in set_shp_to_vdpp2_reg()
H A Dvdpp2_reg.h895 } reg100; // 0x0390 member
/rockchip-linux_mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_rkv.c390 RK_U32 *ref_hight = (RK_U32 *)&p_regs->avs2d_param.reg100; in fill_registers()
H A Dhal_avs2d_vdpu382.c446 RK_U32 *ref_hight = (RK_U32 *)&p_regs->avs2d_param.reg100; in fill_registers()