1 /* 2 * Copyright 2022 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __VDPU382_AVS2D_H__ 18 #define __VDPU382_AVS2D_H__ 19 20 #include "vdpu382_com.h" 21 22 typedef struct Vdpu382RegAvs2dParam_t { 23 struct SWREG64_H26X_SET { 24 RK_U32 h26x_frame_orslice : 1; 25 RK_U32 h26x_rps_mode : 1; 26 RK_U32 h26x_stream_mode : 1; 27 RK_U32 h26x_stream_lastpacket : 1; 28 RK_U32 h264_firstslice_flag : 1; 29 RK_U32 reserve : 27; 30 } reg64; 31 32 RK_U32 reg65_cur_top_poc; 33 RK_U32 reg66_cur_bot_poc; 34 35 RK_U32 reg67_098_ref_poc[32]; 36 37 struct SWREG99_AVS2_REF0_3_INFO { 38 RK_U32 ref0_field : 1; 39 RK_U32 : 1; 40 RK_U32 ref0_botfield_used : 1; 41 RK_U32 ref0_valid_flag : 1; 42 RK_U32 : 4; 43 RK_U32 ref1_field : 1; 44 RK_U32 : 1; 45 RK_U32 ref1_botfield_used : 1; 46 RK_U32 ref1_valid_flag : 1; 47 RK_U32 : 4; 48 RK_U32 ref2_field : 1; 49 RK_U32 : 1; 50 RK_U32 ref2_botfield_used : 1; 51 RK_U32 ref2_valid_flag : 1; 52 RK_U32 : 4; 53 RK_U32 ref3_field : 1; 54 RK_U32 : 1; 55 RK_U32 ref3_botfield_used : 1; 56 RK_U32 ref3_valid_flag : 1; 57 RK_U32 : 4; 58 } reg99; 59 60 struct SWREG100_AVS2_REF4_7_INFO { 61 RK_U32 ref4_field : 1; 62 RK_U32 : 1; 63 RK_U32 ref4_botfield_used : 1; 64 RK_U32 ref4_valid_flag : 1; 65 RK_U32 : 4; 66 RK_U32 ref5_field : 1; 67 RK_U32 : 1; 68 RK_U32 ref5_botfield_used : 1; 69 RK_U32 ref5_valid_flag : 1; 70 RK_U32 : 4; 71 RK_U32 ref6_field : 1; 72 RK_U32 : 1; 73 RK_U32 ref6_botfield_used : 1; 74 RK_U32 ref6_valid_flag : 1; 75 RK_U32 : 4; 76 RK_U32 ref7_field : 1; 77 RK_U32 : 1; 78 RK_U32 ref7_botfield_used : 1; 79 RK_U32 ref7_valid_flag : 1; 80 RK_U32 : 4; 81 } reg100; 82 83 RK_U32 reg101_102[2]; 84 85 struct SW103_CTRL_EXTRA { 86 // 0 : use default 255, 1 : use fixed 256 87 RK_U32 slice_hor_pos_ctrl : 1; 88 RK_U32 : 31; 89 } reg103; 90 91 RK_U32 reg104; 92 struct SW105_HEAD_LEN { 93 RK_U32 head_len : 4; 94 RK_U32 count_update_en : 1; 95 RK_U32 : 27; 96 } reg105; 97 98 RK_U32 reg106_111[6]; 99 struct SW112_ERROR_REF_INFO { 100 // 0 : Frame, 1 : field 101 RK_U32 ref_error_field : 1; 102 /** 103 * @brief Refer error is top field flag. 104 * 0 : Bottom field flag, 105 * 1 : Top field flag. 106 */ 107 RK_U32 ref_error_topfield : 1; 108 // For inter, 0 : top field is no used, 1 : top field is used. 109 RK_U32 ref_error_topfield_used : 1; 110 // For inter, 0 : bottom field is no used, 1 : bottom field is used. 111 RK_U32 ref_error_botfield_used : 1; 112 RK_U32 : 28; 113 } reg112; 114 115 } Vdpu382RegAvs2dParam; 116 117 typedef struct Vdpu382RegAvs2dAddr_t { 118 /* SWREG160 */ 119 RK_U32 reg160_no_use; 120 121 /* SWREG161 */ 122 RK_U32 head_base; 123 124 /* SWREG162 */ 125 RK_U32 reg162_no_use; 126 127 /* SWREG163 */ 128 RK_U32 rps_base; 129 130 /* SWREG164~179 */ 131 RK_U32 ref_base[16]; 132 133 /* SWREG180 */ 134 RK_U32 scanlist_addr; 135 136 /* SWREG181~196 */ 137 RK_U32 colmv_base[16]; 138 139 /* SWREG197 */ 140 RK_U32 cabactbl_base; 141 142 RK_U32 scale_down_luma_base; 143 144 RK_U32 scale_down_chorme_base; 145 } Vdpu382RegAvs2dAddr; 146 147 typedef struct Vdpu382Avs2dRegSet_t { 148 Vdpu382RegCommon common; 149 Vdpu382RegAvs2dParam avs2d_param; 150 Vdpu382RegCommonAddr common_addr; 151 Vdpu382RegAvs2dAddr avs2d_addr; 152 Vdpu382RegIrqStatus irq_status; 153 Vdpu382RegStatistic statistic; 154 } Vdpu382Avs2dRegSet; 155 156 #endif /*__VDPU382_AVS2D_H__*/ 157