Searched refs:FieldOrderCntList (Results 1 – 10 of 10) sorted by relevance
| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_vdpu_com.c | 212 priv->new_dpb[i].top_poc = pp->FieldOrderCntList[i][0]; in get_info_input() 213 priv->new_dpb[i].bot_poc = pp->FieldOrderCntList[i][1]; in get_info_input() 281 pp->FieldOrderCntList[i][0] = old_dpb[i].top_poc; in refill_info_input() 282 pp->FieldOrderCntList[i][1] = old_dpb[i].bot_poc; in refill_info_input() 303 pp->FieldOrderCntList[i][0] = 0; in refill_info_input() 304 pp->FieldOrderCntList[i][1] = 0; in refill_info_input()
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| H A D | hal_h264d_vdpu2.c | 465 *ptr++ = pp->FieldOrderCntList[i / 2][i & 0x1]; in set_vlc_regs() 554 … m_lists[0][i].ref_poc = MPP_MIN(pp->FieldOrderCntList[i][0], pp->FieldOrderCntList[i][1]); in set_ref_regs() 556 m_lists[0][i].ref_poc = pp->FieldOrderCntList[i][0]; in set_ref_regs() 558 m_lists[0][i].ref_poc = pp->FieldOrderCntList[i][1]; in set_ref_regs() 666 … i, pp->FrameNumList[i], pp->FieldOrderCntList[i][0], pp->FieldOrderCntList[i][1]); in set_asic_regs() 679 top_closer = MPP_ABS(pp->FieldOrderCntList[i][0] - cur_poc) < in set_asic_regs() 680 MPP_ABS(pp->FieldOrderCntList[i][1] - cur_poc) ? 0x1 : 0; in set_asic_regs()
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| H A D | hal_h264d_rkv_reg.c | 492 … ? pp->FieldOrderCntList[i / 2][1] : pp->FieldOrderCntList[i / 2][0]; in set_registers() 494 … ? pp->FieldOrderCntList[(i + 15) / 2][0] : pp->FieldOrderCntList[(i + 15) / 2][1]; in set_registers() 510 p_regs->sw72.ref30_poc = pp->FieldOrderCntList[15][0]; in set_registers() 511 p_regs->sw73.ref31_poc = pp->FieldOrderCntList[15][1]; in set_registers()
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| H A D | hal_h264d_vdpu1.c | 429 *pocBase++ = pp->FieldOrderCntList[i / 2][i & 0x1]; in vdpu1_set_vlc_regs() 498 … m_lists[0][i].ref_poc = MPP_MIN(pp->FieldOrderCntList[i][0], pp->FieldOrderCntList[i][1]); in vdpu1_set_ref_regs() 500 m_lists[0][i].ref_poc = pp->FieldOrderCntList[i][0]; in vdpu1_set_ref_regs() 502 m_lists[0][i].ref_poc = pp->FieldOrderCntList[i][1]; in vdpu1_set_ref_regs() 572 top_closer = MPP_ABS(pp->FieldOrderCntList[i][0] - cur_poc) < in vdpu1_set_asic_regs() 573 MPP_ABS(pp->FieldOrderCntList[i][1] - cur_poc) ? 0x1 : 0; in vdpu1_set_asic_regs()
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| H A D | hal_h264d_vdpu34x.c | 611 regs->h264d_param.reg67_98_ref_poc[2 * i] = pp->FieldOrderCntList[i][0]; in set_registers() 612 regs->h264d_param.reg67_98_ref_poc[2 * i + 1] = pp->FieldOrderCntList[i][1]; in set_registers()
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| H A D | hal_h264d_vdpu384a.c | 232 mpp_put_bits(&bp, pp->FieldOrderCntList[i][0], 32); in prepare_spspps() 233 mpp_put_bits(&bp, pp->FieldOrderCntList[i][1], 32); in prepare_spspps()
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| H A D | hal_h264d_vdpu383.c | 245 mpp_put_bits(&bp, pp->FieldOrderCntList[i][0], 32); in prepare_spspps() 246 mpp_put_bits(&bp, pp->FieldOrderCntList[i][1], 32); in prepare_spspps()
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| H A D | hal_h264d_vdpu382.c | 617 regs->h264d_param.reg67_98_ref_poc[2 * i] = pp->FieldOrderCntList[i][0]; in set_registers() 618 regs->h264d_param.reg67_98_ref_poc[2 * i + 1] = pp->FieldOrderCntList[i][1]; in set_registers()
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| /rockchip-linux_mpp/mpp/codec/dec/h264/ |
| H A D | h264d_fill.c | 114 pp->FieldOrderCntList[i][0] = dpb_info[i].TOP_POC; in fill_picparams() 115 pp->FieldOrderCntList[i][1] = dpb_info[i].BOT_POC; in fill_picparams() 126 pp->FieldOrderCntList[i][0] = 0; in fill_picparams() 127 pp->FieldOrderCntList[i][1] = 0; in fill_picparams()
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| /rockchip-linux_mpp/mpp/common/ |
| H A D | h264d_syntax.h | 73 RK_S32 FieldOrderCntList[16][2]; member 360 RK_S32 FieldOrderCntList[16][2]; member
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