| /rk3399_rockchip-uboot/board/imgtec/malta/ |
| H A D | lowlevel_init.S | 68 sw t0, GT_ISD_OFS(t1)
75 sw t0, GT_PCI0IOLD_OFS(t1)
77 sw t0, GT_PCI0IOHD_OFS(t1)
81 sw t0, GT_PCI0M0LD_OFS(t1)
83 sw t0, GT_PCI0M0HD_OFS(t1)
86 sw t0, GT_PCI0M1LD_OFS(t1)
88 sw t0, GT_PCI0M1HD_OFS(t1)
100 sw t1, MSC01_PBC_CLKCFG_OFS(t0)
105 sw t1, MSC01_PBC_CS0TIM_OFS(t0)
110 sw t1, MSC01_PBC_CS0RW_OFS(t0)
[all …]
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| /rk3399_rockchip-uboot/board/pb1x00/ |
| H A D | lowlevel_init.S | 29 sw t1, 0(t0)
33 sw t1, 0(t0)
37 sw t1, 0(t0)
43 sw t2, 0(t1)
57 sw t1, sys_endian(t0)
114 sw t1, 0(t0)
127 sw t1, 0(t0) /* aux pll */
135 sw t1, 0(t0)
139 sw t1, 0(t0)
143 sw t1, 0(t0)
[all …]
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| /rk3399_rockchip-uboot/board/dbau1x00/ |
| H A D | lowlevel_init.S | 29 sw t1, 0(t0)
33 sw t1, 0(t0)
37 sw t1, 0(t0)
41 sw t1, 0(t0)
45 sw t1, 0(t0)
49 sw t1, 0(t0)
62 sw t1, sys_endian(t0)
193 sw t1, 0(t0)
206 sw t1, 0(t0) /* aux pll */
230 sw t1, 0(t0)
[all …]
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| /rk3399_rockchip-uboot/board/freescale/corenet_ds/ |
| H A D | corenet_ds.c | 27 u8 sw; in checkboard() local
39 sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); in checkboard()
40 sw = (sw & PIXIS_LBMAP_MASK) >> PIXIS_LBMAP_SHIFT; in checkboard()
42 if (sw < 0x8) in checkboard()
43 printf("vBank: %d\n", sw); in checkboard()
44 else if (sw == 0x8) in checkboard()
46 else if (sw == 0x9) in checkboard()
61 sw = in_8(&PIXIS_SW(5)); in checkboard()
63 unsigned int clock = (sw >> (6 - (2 * i))) & 3; in checkboard()
69 sw = in_8(&PIXIS_SW(9)); in checkboard()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/common/ |
| H A D | mc34vr500.c | 21 int mc34vr500_get_sw_volt(uint8_t sw) in mc34vr500_get_sw_volt() argument
30 __func__, sw + 1, swxvolt_addr[sw]); in mc34vr500_get_sw_volt()
31 if (sw > SW4) { in mc34vr500_get_sw_volt()
32 printf("%s: Unsupported SW(sw%d)\n", __func__, sw + 1); in mc34vr500_get_sw_volt()
46 ret = pmic_reg_read(p, swxvolt_addr[sw], &swxvolt); in mc34vr500_get_sw_volt()
48 printf("%s: Failed to get SW%u volt\n", __func__, sw + 1); in mc34vr500_get_sw_volt()
52 debug("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt); in mc34vr500_get_sw_volt()
53 spb = swx_set_point_base[sw]; in mc34vr500_get_sw_volt()
57 debug("%s: SW%u volt = %dmV\n", __func__, sw + 1, sw_volt); in mc34vr500_get_sw_volt()
61 int mc34vr500_set_sw_volt(uint8_t sw, int sw_volt) in mc34vr500_set_sw_volt() argument
[all …]
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| /rk3399_rockchip-uboot/board/freescale/t208xqds/ |
| H A D | t208xqds.c | 31 u8 sw; in checkboard() local
39 sw = QIXIS_READ(arch); in checkboard()
40 printf("Sys ID: 0x%02x, Board Arch: V%d, ", QIXIS_READ(id), sw >> 4); in checkboard()
41 printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1); in checkboard()
48 sw = QIXIS_READ(brdcfg[0]); in checkboard()
49 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
51 if (sw < 0x8) in checkboard()
52 printf("vBank%d\n", sw); in checkboard()
53 else if (sw == 0x8) in checkboard()
55 else if (sw == 0x9) in checkboard()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/ls2080ardb/ |
| H A D | ls2080ardb.c | 64 u8 sw; in checkboard() local
73 sw = QIXIS_READ(arch); in checkboard()
74 printf("Board Arch: V%d, ", sw >> 4); in checkboard()
75 printf("Board version: %c, ", (sw & 0xf) + 'A'); in checkboard()
77 sw = QIXIS_READ(brdcfg[0]); in checkboard()
78 sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT; in checkboard()
79 switch (sw) { in checkboard()
101 printf("invalid setting of SW%u\n", sw); in checkboard()
110 sw = QIXIS_READ(arch); in checkboard()
111 printf("Board Arch: V%d, ", sw >> 4); in checkboard()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/t1040qds/ |
| H A D | t1040qds.c | 32 u8 sw; in checkboard() local
42 sw = QIXIS_READ(brdcfg[0]); in checkboard()
43 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
45 if (sw < 0x8) in checkboard()
46 printf("vBank: %d\n", sw); in checkboard()
47 else if (sw == 0x8) in checkboard()
49 else if (sw == 0x9) in checkboard()
51 else if (sw == 0x15) in checkboard()
71 sw = QIXIS_READ(brdcfg[2]); in checkboard()
72 clock = (sw >> 6) & 3; in checkboard()
[all …]
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| H A D | diu.c | 74 u8 sw; in platform_diu_init() local
77 sw = QIXIS_READ(brdcfg[5]); in platform_diu_init()
79 ((sw & ~(BRDCFG5_IMX_MASK)) | (BRDCFG5_IMX_DIU))); in platform_diu_init()
82 sw = QIXIS_READ(brdcfg[15]); in platform_diu_init()
84 ((sw & ~(BRDCFG15_LCDPD_MASK | BRDCFG15_DIUSEL_MASK)) in platform_diu_init()
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| /rk3399_rockchip-uboot/board/freescale/ls2080aqds/ |
| H A D | ls2080aqds.c | 63 u8 sw; in checkboard() local
71 sw = QIXIS_READ(arch); in checkboard()
72 printf("Board Arch: V%d, ", sw >> 4); in checkboard()
73 printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1); in checkboard()
77 sw = QIXIS_READ(brdcfg[0]); in checkboard()
78 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
80 if (sw < 0x8) in checkboard()
81 printf("vBank: %d\n", sw); in checkboard()
82 else if (sw == 0x8) in checkboard()
84 else if (sw == 0x9) in checkboard()
[all …]
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| /rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/ |
| H A D | lowlevel_init.S | 106 sw t1, QCA953X_RESET_REG_RESET_MODULE(t0)
111 sw t1, QCA953X_RESET_REG_RESET_MODULE(t0)
117 sw t1, QCA953X_RTC_REG_SYNC_RESET(t0)
130 sw t1, QCA953X_SRIF_BB_DPLL2_REG(t0)
131 sw t1, QCA953X_SRIF_PCIE_DPLL2_REG(t0)
132 sw t1, QCA953X_SRIF_DDR_DPLL2_REG(t0)
133 sw t1, QCA953X_SRIF_CPU_DPLL2_REG(t0)
138 sw t1, QCA953X_PLL_CLK_CTRL_REG(t0)
142 sw t1, QCA953X_PLL_CPU_CONFIG_REG(t0)
146 sw t1, QCA953X_PLL_DDR_CONFIG_REG(t0)
[all …]
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| /rk3399_rockchip-uboot/board/freescale/ls1088a/ |
| H A D | ls1088a.c | 72 u8 sw; in checkboard() local
83 sw = QIXIS_READ(arch); in checkboard()
84 printf("Board Arch: V%d, ", sw >> 4); in checkboard()
87 printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1); in checkboard()
89 printf("Board version: %c, boot from ", (sw & 0xf) + 'A'); in checkboard()
94 sw = QIXIS_READ(brdcfg[0]); in checkboard()
95 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
100 switch (sw) { in checkboard()
110 printf("vBank: %d\n", sw); in checkboard()
123 sw = QIXIS_READ(brdcfg[0]); in checkboard()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/t4rdb/ |
| H A D | t4240rdb.c | 30 u8 sw; in checkboard() local
36 sw = CPLD_READ(vbank); in checkboard()
37 sw = sw & CPLD_BANK_SEL_MASK; in checkboard()
39 if (sw <= 7) in checkboard()
40 printf("vBank: %d\n", sw); in checkboard()
42 printf("Unsupported Bank=%x\n", sw); in checkboard()
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| /rk3399_rockchip-uboot/arch/mips/mach-ath79/ar933x/ |
| H A D | lowlevel_init.S | 85 sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
90 sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
107 sw t1, AR933X_RESET_REG_BOOTSTRAP(t0)
113 sw t1, AR933X_RTC_REG_FORCE_WAKE(t0)
119 sw t1, AR933X_RTC_REG_RESET(t0)
124 sw t1, AR933X_RTC_REG_RESET(t0)
146 sw t1, AR933X_SRIF_DDR_DPLL2_REG(t0)
154 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)
160 sw t1, AR933X_PLL_CLK_CTRL_REG(t0)
173 sw t1, AR71XX_PLL_REG_SEC_CONFIG(t0)
[all …]
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| /rk3399_rockchip-uboot/board/freescale/p1022ds/ |
| H A D | diu.c | 342 int sw = set_mux_to_lbc(); in flash_write8() local
345 if (sw) { in flash_write8()
360 int sw = set_mux_to_lbc(); in flash_write16() local
363 if (sw) { in flash_write16()
378 int sw = set_mux_to_lbc(); in flash_write32() local
381 if (sw) { in flash_write32()
396 int sw = set_mux_to_lbc(); in flash_write64() local
409 if (sw) { in flash_write64()
428 int sw = set_mux_to_lbc(); in flash_read8() local
431 if (sw) in flash_read8()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/t102xqds/ |
| H A D | t102xqds.c | 34 u8 sw = QIXIS_READ(arch); in checkboard() local
37 printf("Sys ID: 0x%02x, Board Arch: V%d, ", QIXIS_READ(id), sw >> 4); in checkboard()
38 printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1); in checkboard()
45 sw = QIXIS_READ(brdcfg[0]); in checkboard()
46 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
48 if (sw < 0x8) in checkboard()
49 printf("vBank: %d\n", sw); in checkboard()
50 else if (sw == 0x8) in checkboard()
52 else if (sw == 0x9) in checkboard()
54 else if (sw == 0x15) in checkboard()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/t4qds/ |
| H A D | t4240qds.c | 43 u8 sw; in checkboard() local
51 sw = QIXIS_READ(brdcfg[0]); in checkboard()
52 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
54 if (sw < 0x8) in checkboard()
55 printf("vBank: %d\n", sw); in checkboard()
56 else if (sw == 0x8) in checkboard()
58 else if (sw == 0x9) in checkboard()
78 sw = QIXIS_READ(brdcfg[2]); in checkboard()
82 unsigned int clock = (sw >> (6 - 2 * i)) & 3; in checkboard()
640 u8 sw; in misc_init_r() local
[all …]
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| /rk3399_rockchip-uboot/board/freescale/ls1012aqds/ |
| H A D | ls1012aqds.c | 37 u8 sw; in checkboard() local
39 sw = QIXIS_READ(arch); in checkboard()
40 printf("Board Arch: V%d, ", sw >> 4); in checkboard()
41 printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1); in checkboard()
43 sw = QIXIS_READ(brdcfg[QIXIS_LBMAP_BRDCFG_REG]); in checkboard()
45 if (sw & QIXIS_LBMAP_ALTBANK) in checkboard()
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| /rk3399_rockchip-uboot/board/freescale/p2041rdb/ |
| H A D | p2041rdb.c | 28 u8 sw; in checkboard() local
36 sw = CPLD_READ(fbank_sel); in checkboard()
37 printf("vBank: %d\n", sw & 0x1); in checkboard()
48 sw = in_8(&CPLD_SW(2)) >> 2; in checkboard()
53 unsigned int clock = (sw >> (2 * i)) & 3; in checkboard()
168 u8 sw; in misc_init_r() local
175 sw = in_8(&CPLD_SW(2)) >> 2; in misc_init_r()
177 unsigned int clock = (sw >> (2 * i)) & 3; in misc_init_r()
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| /rk3399_rockchip-uboot/board/freescale/ls1046aqds/ |
| H A D | ls1046aqds.c | 43 u8 sw; in checkboard() local
51 sw = QIXIS_READ(brdcfg[0]); in checkboard()
52 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
54 if (sw < 0x8) in checkboard()
55 printf("vBank: %d\n", sw); in checkboard()
56 else if (sw == 0x8) in checkboard()
58 else if (sw == 0x9) in checkboard()
60 else if (sw == 0xF) in checkboard()
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| /rk3399_rockchip-uboot/board/freescale/b4860qds/ |
| H A D | b4860qds.c | 39 u8 sw; in checkboard() local
49 sw = QIXIS_READ(brdcfg[0]); in checkboard()
50 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
52 if (sw < 0x8) in checkboard()
53 printf("vBank: %d\n", sw); in checkboard()
54 else if (sw >= 0x8 && sw <= 0xE) in checkboard()
74 sw = QIXIS_READ(brdcfg[2]); in checkboard()
75 clock = (sw >> 5) & 7; in checkboard()
77 sw = QIXIS_READ(brdcfg[4]); in checkboard()
78 clock = (sw >> 6) & 3; in checkboard()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/ls1043aqds/ |
| H A D | ls1043aqds.c | 53 u8 sw; in checkboard() local
61 sw = QIXIS_READ(brdcfg[0]); in checkboard()
62 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
64 if (sw < 0x8) in checkboard()
65 printf("vBank: %d\n", sw); in checkboard()
66 else if (sw == 0x8) in checkboard()
68 else if (sw == 0x9) in checkboard()
70 else if (sw == 0xF) in checkboard()
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| /rk3399_rockchip-uboot/board/freescale/t104xrdb/ |
| H A D | t104xrdb.c | 30 u8 sw; in checkboard() local
40 sw = CPLD_READ(flash_ctl_status); in checkboard()
41 sw = ((sw & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT); in checkboard()
43 printf("vBank: %d\n", sw); in checkboard()
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap3/ |
| H A D | dss.h | 218 #define DSS_HSW(sw) ((sw) - 1) argument
221 #define DSS_VSW(sw) ((sw) - 1) argument
223 #define PANEL_TIMING_H(bp, fp, sw) (DSS_HBP(bp) | DSS_HFP(fp) | DSS_HSW(sw)) argument
224 #define PANEL_TIMING_V(bp, fp, sw) (DSS_VBP(bp) | DSS_VFP(fp) | DSS_VSW(sw)) argument
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| /rk3399_rockchip-uboot/board/freescale/ls1021aqds/ |
| H A D | ls1021aqds.c | 67 u8 sw; in checkboard() local
77 sw = QIXIS_READ(brdcfg[0]); in checkboard()
78 sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; in checkboard()
80 if (sw < 0x8) in checkboard()
81 printf("vBank: %d\n", sw); in checkboard()
82 else if (sw == 0x8) in checkboard()
84 else if (sw == 0x9) in checkboard()
86 else if (sw == 0x15) in checkboard()
|