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/rk3399_rockchip-uboot/arch/arm/dts/
H A Duniphier-ld20.dtsi48 operating-points-v2 = <&cluster0_opp>;
57 operating-points-v2 = <&cluster0_opp>;
66 operating-points-v2 = <&cluster1_opp>;
75 operating-points-v2 = <&cluster1_opp>;
80 compatible = "operating-points-v2";
118 compatible = "operating-points-v2";
H A Dimx6dl.dtsi29 operating-points = <
35 fsl,soc-operating-points = <
H A Duniphier-pxs3.dtsi45 operating-points-v2 = <&cluster0_opp>;
54 operating-points-v2 = <&cluster0_opp>;
63 operating-points-v2 = <&cluster0_opp>;
72 operating-points-v2 = <&cluster0_opp>;
77 compatible = "operating-points-v2";
H A Duniphier-pxs2.dtsi26 operating-points-v2 = <&cpu_opp>;
36 operating-points-v2 = <&cpu_opp>;
46 operating-points-v2 = <&cpu_opp>;
56 operating-points-v2 = <&cpu_opp>;
61 compatible = "operating-points-v2";
H A Duniphier-ld11.dtsi39 operating-points-v2 = <&cluster0_opp>;
48 operating-points-v2 = <&cluster0_opp>;
53 compatible = "operating-points-v2";
H A Dimx6q.dtsi30 operating-points = <
38 fsl,soc-operating-points = <
H A Ddra74x.dtsi24 operating-points = <
H A Dstih410.dtsi22 operating-points-v2 = <&cpu0_opp_table>;
26 operating-points-v2 = <&cpu0_opp_table>;
31 compatible = "operating-points-v2";
H A Domap36xx.dtsi23 operating-points = <
H A Drv1126.dtsi54 operating-points-v2 = <&cpu0_opp_table>;
64 operating-points-v2 = <&cpu0_opp_table>;
74 operating-points-v2 = <&cpu0_opp_table>;
84 operating-points-v2 = <&cpu0_opp_table>;
104 compatible = "operating-points-v2";
1409 rockchip,interpolat-points = <1>;
1425 operating-points-v2 = <&dmc_opp_table>;
1446 compatible = "operating-points-v2";
1759 operating-points-v2 = <&rkvenc_opp_table>;
1770 compatible = "operating-points-v2";
[all …]
H A Duniphier-pro5.dtsi26 operating-points-v2 = <&cpu_opp>;
36 operating-points-v2 = <&cpu_opp>;
41 compatible = "operating-points-v2";
H A Dimx7d.dtsi49 operating-points = <
H A Dsun4i-a10-olinuxino-lime.dts84 operating-points = <
H A Dsun7i-a20-bananapi.dts101 operating-points = <
H A Drk3562.dtsi139 operating-points-v2 = <&cpu0_opp_table>;
147 operating-points-v2 = <&cpu0_opp_table>;
155 operating-points-v2 = <&cpu0_opp_table>;
163 operating-points-v2 = <&cpu0_opp_table>;
168 compatible = "operating-points-v2";
1003 operating-points-v2 = <&gpu_opp_table>;
1010 compatible = "operating-points-v2";
H A Drk3528.dtsi82 operating-points-v2 = <&cpu0_opp_table>;
92 operating-points-v2 = <&cpu0_opp_table>;
102 operating-points-v2 = <&cpu0_opp_table>;
112 operating-points-v2 = <&cpu0_opp_table>;
142 compatible = "operating-points-v2";
811 operating-points-v2 = <&gpu_opp_table>;
826 compatible = "operating-points-v2";
H A Drk3568.dtsi66 operating-points-v2 = <&cpu0_opp_table>;
75 operating-points-v2 = <&cpu0_opp_table>;
84 operating-points-v2 = <&cpu0_opp_table>;
93 operating-points-v2 = <&cpu0_opp_table>;
98 compatible = "operating-points-v2";
772 operating-points-v2 = <&gpu_opp_table>;
785 compatible = "operating-points-v2";
2030 rockchip,interpolat-points = <1>;
H A Drk3576.dtsi429 operating-points-v2 = <&cluster0_opp_table>;
439 operating-points-v2 = <&cluster0_opp_table>;
449 operating-points-v2 = <&cluster0_opp_table>;
459 operating-points-v2 = <&cluster0_opp_table>;
469 operating-points-v2 = <&cluster1_opp_table>;
479 operating-points-v2 = <&cluster1_opp_table>;
489 operating-points-v2 = <&cluster1_opp_table>;
499 operating-points-v2 = <&cluster1_opp_table>;
504 compatible = "operating-points-v2";
540 compatible = "operating-points-v2";
[all …]
H A Dzynq-7000.dtsi26 operating-points = <
H A Dsun5i-a13.dtsi335 operating-points = <
/rk3399_rockchip-uboot/doc/device-tree-bindings/pci/
H A Darmada8k-pcie.txt9 "ctrl" registers points to the global control registers, while the "config" space
10 points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below.
/rk3399_rockchip-uboot/drivers/video/
H A Dstb_truetype.h1264 stbtt_uint8 *points; in stbtt_GetGlyphShape() local
1267 points = data + g + 10 + numberOfContours * 2 + 2 + ins; in stbtt_GetGlyphShape()
1289 flags = *points++; in stbtt_GetGlyphShape()
1291 flagcount = *points++; in stbtt_GetGlyphShape()
1302 stbtt_int16 dx = *points++; in stbtt_GetGlyphShape()
1306 x = x + (stbtt_int16) (points[0]*256 + points[1]); in stbtt_GetGlyphShape()
1307 points += 2; in stbtt_GetGlyphShape()
1318 stbtt_int16 dy = *points++; in stbtt_GetGlyphShape()
1322 y = y + (stbtt_int16) (points[0]*256 + points[1]); in stbtt_GetGlyphShape()
1323 points += 2; in stbtt_GetGlyphShape()
[all …]
/rk3399_rockchip-uboot/doc/
H A DREADME.SPL81 stack usage at various points in run sequence of SPL. The -fstack-usage option
H A DREADME.srio-pcie-boot-corenet83 To use this feature, you need to focus those points.
H A DREADME.power-framework145 For points 1 and 2 use a generic function power_init_board() to initialise the

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