| #
5a516748 |
| 07-May-2013 |
Liu Gang <Gang.Liu@freescale.com> |
powerpc/doc: Update the README.srio-pcie-boot-corenet
1. Misalignment will be found in the doc/README.srio-pcie-boot-corenet file when the tabs are set to 8 characters. And the standard for u-
powerpc/doc: Update the README.srio-pcie-boot-corenet
1. Misalignment will be found in the doc/README.srio-pcie-boot-corenet file when the tabs are set to 8 characters. And the standard for u-boot should be 8 character tabs! So this issue should be amended.
2. Add a NOTE for the ENV parameters of the Slave.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
show more ...
|
| #
fc54c7fa |
| 09-Aug-2012 |
Liu Gang <Gang.Liu@freescale.com> |
powerpc/corenet_ds: Update README and README.srio-pcie-boot-corenet
Added descriptions about boot from PCIE in the files README and doc/README.srio-pcie-boot-corenet, and changed the name of the doc
powerpc/corenet_ds: Update README and README.srio-pcie-boot-corenet
Added descriptions about boot from PCIE in the files README and doc/README.srio-pcie-boot-corenet, and changed the name of the doc/README.srio-boot-corenet to doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
show more ...
|