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/rk3399_rockchip-uboot/doc/device-tree-bindings/spi/
H A Dsoft-spi.txt10 soft_spi_cs: GPIO number to use for SPI chip select (output)
11 soft_spi_sclk: GPIO number to use for SPI clock (output)
12 soft_spi_mosi: GPIO number to use for SPI MOSI line (output)
13 soft_spi_miso GPIO number to use for SPI MISO line (input)
18 typically holds the GPIO number.
H A Dspi-bus.txt10 - #address-cells - number of cells required to define a chip select
26 - num-cs : total number of chipselects
28 If cs-gpios is used the number of chip select will automatically increased
58 - spi-tx-bus-width - (optional) The bus width(number of data wires) that
60 - spi-rx-bus-width - (optional) The bus width(number of data wires) that
71 If a gpio chipselect is used for the SPI slave the gpio number will be passed
H A Dspi-zynq.txt8 number.
17 If a decoder is used, this will be the number of
H A Dspi-stm32-qspi.txt14 - spi-tx-bus-width : Bus width (number of lines) for writing (1-4)
15 - spi-rx-bus-width : Bus width (number of lines) for reading (1-4)
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/
H A Dcache_v7_asm.S47 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
50 ands r7, r7, r1, lsr #13 @ extract max number of the index size
54 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
56 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
57 ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
59 THUMB( orr r11, r11, r6 ) @ factor index number into r11
66 add r10, r10, #2 @ increment cache number
120 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
123 ands r7, r7, r1, lsr #13 @ extract max number of the index size
127 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
[all …]
/rk3399_rockchip-uboot/drivers/rng/
H A DKconfig5 Enable driver model for random number generator(rng) devices.
12 bool "Enable random number generator for rockchip crypto rng"
16 Enable random number generator for rockchip.This driver is
/rk3399_rockchip-uboot/doc/device-tree-bindings/
H A Droot.txt4 - serial-number : a string representing the device's serial number
/rk3399_rockchip-uboot/doc/
H A DREADME.ubi62 UBI: number of good PEBs: 8
63 UBI: number of bad PEBs: 0
66 UBI: number of internal volumes: 1
67 UBI: number of user volumes: 1
69 UBI: total number of reserved PEBs: 8
70 UBI: number of PEBs reserved for bad PEB handling: 0
126 UBI: number of good PEBs: 8
127 UBI: number of bad PEBs: 0
133 UBI: number of internal volumes: 1
134 UBI: number of user volumes: 1
[all …]
/rk3399_rockchip-uboot/doc/device-tree-bindings/ram/
H A Dst,stm32-fmc.txt10 number of columns
11 number of rows
13 number of intenal banks in memory
/rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/
H A Disp-spi.txt6 which will have a value beyond the maximum number of interrupts exynos5 can
12 - interrupts : A value which is beyond the maximum number of interrupts
/rk3399_rockchip-uboot/include/rockchip/
H A Dcrypto_v2_util.h42 #define COUNT_ONE_BITS(number, bit_count) \ argument
44 u32 tmp_num = number; \
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/ls102xa/
H A DKconfig36 int "Maximum number of CPUs permitted for LS102xA"
40 Set this number to the maximum number of possible CPUs in the SoC.
/rk3399_rockchip-uboot/doc/device-tree-bindings/misc/
H A Dintel,irq-router.txt24 The second cell is the total number of PIRQ links the router supports.
29 bus number, device number and function number encoding with PCI_BDF() macro.
/rk3399_rockchip-uboot/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier.h30 unsigned number; member
78 .number = a, \
/rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/
H A Dnvidia,tegra186-gpio.txt32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port
36 The number of ports implemented by each GPIO controller varies. The number of
48 Each GPIO controller can generate a number of interrupt signals. Each signal
50 number of interrupt signals generated by a controller varies as a rough function
51 of the number of ports it implements. Note that the HW documentation refers to
90 order the HW manual describes them. The number of entries required varies
102 - The first cell is the pin number.
116 - The first cell is the GPIO number.
H A Dgpio-samsung.txt12 [pin number within the gpio controller]
18 - Pin number: is a value between 0 to 7.
H A Dnvidia,tegra20-gpio.txt9 - #gpio-cells : Should be two. The first cell is the pin number and the
14 The first cell is the GPIO number.
/rk3399_rockchip-uboot/drivers/usb/dwc3/
H A Dep0.c94 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, in dwc3_ep0_start_trans()
103 dep->number); in dwc3_ep0_start_trans()
117 req->epnum = dep->number; in __dwc3_gadget_ep0_queue()
938 req->direction = !!dep->number; in __dwc3_ep0_do_control_data()
941 ret = dwc3_ep0_start_trans(dwc, dep->number, in __dwc3_ep0_do_control_data()
945 (dep->number == 0)) { in __dwc3_ep0_do_control_data()
950 dep->number); in __dwc3_ep0_do_control_data()
960 ret = dwc3_ep0_start_trans(dwc, dep->number, in __dwc3_ep0_do_control_data()
976 ret = dwc3_ep0_start_trans(dwc, dep->number, in __dwc3_ep0_do_control_data()
981 dep->number); in __dwc3_ep0_do_control_data()
[all …]
H A Dgadget.h99 static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3 *dwc, u8 number) in dwc3_gadget_ep_get_transfer_index() argument
103 res_id = dwc3_readl(dwc->regs, DWC3_DEPCMD(number)); in dwc3_gadget_ep_get_transfer_index()
H A Dgadget.c252 if (dwc->ep0_bounced && dep->number == 0) in dwc3_gadget_giveback()
338 if (dep->number == 0 || dep->number == 1) in dwc3_alloc_trb_pool()
368 if (dep->number != 1) { in dwc3_gadget_start_config()
371 if (dep->number > 1) { in dwc3_gadget_start_config()
429 params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number); in dwc3_gadget_set_ep_config()
436 params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1); in dwc3_gadget_set_ep_config()
443 return dwc3_send_gadget_ep_cmd(dwc, dep->number, in dwc3_gadget_set_ep_config()
455 return dwc3_send_gadget_ep_cmd(dwc, dep->number, in dwc3_gadget_set_xfer_resource()
502 reg |= DWC3_DALEPENA_EP(dep->number); in __dwc3_gadget_ep_enable()
529 dwc3_stop_active_transfer(dwc, dep->number, true); in dwc3_remove_requests()
[all …]
/rk3399_rockchip-uboot/doc/device-tree-bindings/pwm/
H A Dpwm.txt43 pwm-specifier typically encodes the chip-relative PWM number and the PWM
46 Optionally, the pwm-specifier can encode a number of flags (defined in
60 PWM controller nodes must specify the number of cells used for the
/rk3399_rockchip-uboot/arch/xtensa/dts/
H A Dxtfpga.dtsi30 /* one cell: internal irq number,
31 * two cells: second cell == 0: internal irq number
32 * second cell == 1: external irq number
/rk3399_rockchip-uboot/doc/device-tree-bindings/serial/
H A Domap_serial.txt15 - ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
20 node and a DMA channel number.
/rk3399_rockchip-uboot/doc/device-tree-bindings/pinctrl/
H A Dst,stm32-pinctrl.txt24 The first cell is the pin number
77 - pinmux: integer array, represents gpio pin number and mux setting.
78 Supported pin number and mux varies for different SoCs, and are defined in
85 - function: The function number, can be:
/rk3399_rockchip-uboot/drivers/bootcount/
H A DKconfig11 number of times the board has booted on a number of different

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