Searched refs:mii (Results 1 – 25 of 43) sorted by relevance
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| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | pic32_eth.c | 87 return pic32_mdio_init(PIC32_MDIO_NAME, (ulong)&emac_p->mii); in pic32_mii_init()
92 struct mii_dev *mii; in pic32_phy_init() local
94 mii = miiphy_get_dev_by_name(PIC32_MDIO_NAME); in pic32_phy_init()
97 priv->phydev = phy_connect(mii, priv->phy_addr, in pic32_phy_init()
217 struct mii_dev *mii; in pic32_mac_reset() local
227 mii = priv->phydev->bus; in pic32_mac_reset()
228 if (mii && mii->reset) in pic32_mac_reset()
229 mii->reset(mii); in pic32_mac_reset()
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| H A D | dwc_eth_qos.c | 1210 eqos->phy = phy_connect(eqos->mii, addr, dev, in eqos_init()
2048 eqos->mii = eth_phy_get_mdio_bus(dev); in eqos_probe()
2050 if (!eqos->mii) { in eqos_probe()
2051 eqos->mii = mdio_alloc(); in eqos_probe()
2052 if (!eqos->mii) { in eqos_probe()
2057 eqos->mii->read = eqos_mdio_read; in eqos_probe()
2058 eqos->mii->write = eqos_mdio_write; in eqos_probe()
2059 eqos->mii->priv = eqos; in eqos_probe()
2060 strcpy(eqos->mii->name, dev->name); in eqos_probe()
2062 ret = mdio_register(eqos->mii); in eqos_probe()
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| H A D | dwc_eth_qos.h | 64 struct mii_dev *mii; member
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| H A D | pic32_eth.h | 50 struct pic32_mii_regs mii; /* 0x280 - 0x2d0 */ member
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.bitbangMII | 2 support an arbitrary number of mii buses. This feature is useful when your
3 board uses different mii buses for different phys and all (or a part) of these
29 the bb_miiphy_buses_num variable with the number of mii buses.
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| H A D | README.drivers.eth | 191 every device does), you should add support for the mii command. Doing so is
192 fairly trivial and makes debugging mii issues a lot easier at runtime.
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| H A D | README.m54418twr | 119 make M54418TWR_nand_mii_config, or - default to nand flash boot, mii mode, 25Mhz input clock
220 mii - MII utility commands
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/net/ |
| H A D | ethernet.txt | 13 "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
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| H A D | allwinner,sun7i-a20-gmac.txt | 26 phy-mode = "mii";
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | uniphier-support-card.dtsi | 23 phy-mode = "mii";
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| H A D | sun7i-a20-m5.dts | 37 phy-mode = "mii";
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| H A D | armada-37xx.dtsi | 175 rgmii_pins: mii-pins {
177 function = "mii";
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| H A D | sun8i-h3-nanopi-neo.dts | 52 phy-mode = "mii";
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| H A D | am335x-bone-common.dtsi | 364 phy-mode = "mii";
369 phy-mode = "mii";
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| H A D | sun6i-a31s-cs908.dts | 73 phy-mode = "mii";
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| H A D | sun7i-a20-m3.dts | 89 phy-mode = "mii";
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| H A D | sun7i-a20-itead-ibox.dts | 101 phy-mode = "mii";
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| H A D | sun6i-a31s-sina31s.dts | 81 phy-mode = "mii";
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| H A D | sun8i-h3-orangepi-one.dts | 99 phy-mode = "mii";
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| H A D | sun6i-a31-i7.dts | 86 phy-mode = "mii";
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| H A D | sun7i-a20-icnova-swac.dts | 80 phy-mode = "mii";
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| H A D | sun8i-h3-orangepi-pc.dts | 171 phy-mode = "mii";
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| H A D | sun8i-h2-plus-orangepi-zero.dts | 104 phy-mode = "mii";
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| /rk3399_rockchip-uboot/scripts/coccinelle/net/ |
| H A D | mdio_register.cocci | 3 //# Stop using the oldest mii interface in drivers
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| /rk3399_rockchip-uboot/board/freescale/m547xevb/ |
| H A D | README | 13 - board/freescale/m547xevb/mii.c MII init
244 mii - MII utility commands
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