| /rk3399_rockchip-uboot/arch/arm/mach-keystone/ |
| H A D | psc.c | 98 u32 mdctl; in psc_set_state() local
131 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()
132 mdctl = PSC_REG_MDCTL_SET_NEXT(mdctl, state); in psc_set_state()
133 mdctl = PSC_REG_MDCTL_SET_RESET_ISO(mdctl, reset_iso); in psc_set_state()
134 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()
158 u32 mdctl; in psc_enable_module() local
161 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_enable_module()
162 if ((mdctl & 0x3f) == PSC_REG_VAL_MDSTAT_STATE_ON) in psc_enable_module()
176 u32 mdctl; in psc_disable_module() local
179 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_disable_module()
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| /rk3399_rockchip-uboot/arch/arm/mach-davinci/ |
| H A D | psc.c | 36 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in lpsc_transition() local
46 mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); in lpsc_transition()
55 mdctl = &psc_regs->psc0.mdctl[id]; in lpsc_transition()
62 mdctl = &psc_regs->psc1.mdctl[id]; in lpsc_transition()
74 writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl); in lpsc_transition()
93 writel(readl(mdctl) | 0x200, mdctl); in lpsc_transition()
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| H A D | dm365_lowlevel.c | 252 writel(((readl(&dv_psc_regs->mdctl[DAVINCI_LPSC_VPSSMASTER]) & in dm365_vpss_sync_reset()
254 &dv_psc_regs->mdctl[DAVINCI_LPSC_VPSSMASTER]); in dm365_vpss_sync_reset()
338 setbits_le32(&dv_psc_regs->mdctl[i], PSC_ENABLE); in dm365_psc_init()
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| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | fsl_mmdc.c | 54 tmp = priv->mdctl & ~(MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init()
55 out_be32(&mmdc->mdctl, tmp); in mmdc_init()
63 out_be32(&mmdc->mdctl, tmp | MDCTL_SDE0); in mmdc_init()
65 out_be32(&mmdc->mdctl, tmp | MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init()
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| /rk3399_rockchip-uboot/board/Barix/ipam390/ |
| H A D | ipam390.c | 46 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local
51 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
61 *mdctl |= 0x03; in dsp_lpsc_on()
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| /rk3399_rockchip-uboot/arch/arm/mach-imx/ |
| H A D | cpu.c | 102 #define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) argument
103 #define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) argument
104 #define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) argument
105 #define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) argument
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| /rk3399_rockchip-uboot/board/davinci/da8xxevm/ |
| H A D | omapl138_lcdk.c | 263 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local
268 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
278 *mdctl |= 0x03; in dsp_lpsc_on()
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| H A D | da850evm.c | 75 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local
80 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
90 *mdctl |= 0x03; in dsp_lpsc_on()
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| /rk3399_rockchip-uboot/arch/arm/mach-davinci/include/mach/ |
| H A D | psc_defs.h | 50 unsigned int mdctl[52]; /* 0xA00 */ member
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| H A D | hardware.h | 345 dv_reg mdctl[PSC_PSC0_MODULE_ID_CNT]; member
350 dv_reg mdctl[PSC_PSC1_MODULE_ID_CNT]; member
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| /rk3399_rockchip-uboot/include/ |
| H A D | fsl_mmdc.h | 68 u32 mdctl; member
154 u32 mdctl; member
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| /rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 242 cs0_enable_initial = readl(&mmdc0->mdctl) & 0x80000000; in mmdc_do_dqs_calibration()
243 cs1_enable_initial = readl(&mmdc0->mdctl) & 0x40000000; in mmdc_do_dqs_calibration()
293 clrbits_le32(&mmdc0->mdctl, 1 << 30); /* clear SDE_1 */ in mmdc_do_dqs_calibration()
295 clrbits_le32(&mmdc0->mdctl, 1 << 31); /* clear SDE_0 */ in mmdc_do_dqs_calibration()
301 cs0_enable = readl(&mmdc0->mdctl) & 0x80000000; in mmdc_do_dqs_calibration()
302 cs1_enable = readl(&mmdc0->mdctl) & 0x40000000; in mmdc_do_dqs_calibration()
516 setbits_le32(&mmdc0->mdctl, 1 << 30); in mmdc_do_dqs_calibration()
520 setbits_le32(&mmdc0->mdctl, 1 << 31); in mmdc_do_dqs_calibration()
1142 mmdc0->mdctl = (lpddr2_cfg->rowaddr - 11) << 24 | /* ROW */ in mx6_lpddr2_cfg()
1152 mmdc0->mdctl |= (1 << 31) | /* SDE_0 for CS0 */ in mx6_lpddr2_cfg()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx6/ |
| H A D | mx6-ddr.h | 40 u32 mdctl; member
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