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Searched refs:hdisplay (Results 1 – 25 of 31) sorted by relevance

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/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_display_helper.c63 if (edid_data->mode_buf[i].hdisplay > max_output->width || in drm_mode_max_resolution_filter()
116 p->crtc_hdisplay = p->hdisplay; in drm_mode_set_crtcinfo()
177 hactive = mode->hdisplay; in drm_mode_convert_to_origin_mode()
178 hfp = mode->hsync_start - mode->hdisplay; in drm_mode_convert_to_origin_mode()
184 mode->hdisplay = hactive / 2; in drm_mode_convert_to_origin_mode()
185 mode->hsync_start = mode->hdisplay + hfp / 2; in drm_mode_convert_to_origin_mode()
194 hactive = mode->hdisplay; in drm_mode_convert_to_split_mode()
195 hfp = mode->hsync_start - mode->hdisplay; in drm_mode_convert_to_split_mode()
201 mode->hdisplay = hactive * 2; in drm_mode_convert_to_split_mode()
202 mode->hsync_start = mode->hdisplay + hfp * 2; in drm_mode_convert_to_split_mode()
H A Ddrm_modes.c90 return mode1->hdisplay == mode2->hdisplay && in drm_mode_match_timings()
210 dmode->hdisplay = vm->hactive; in drm_display_mode_from_videomode()
211 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; in drm_display_mode_from_videomode()
249 vm->hactive = dmode->hdisplay; in drm_display_mode_to_videomode()
250 vm->hfront_porch = dmode->hsync_start - dmode->hdisplay; in drm_display_mode_to_videomode()
H A Drk1000_tve.c186 mode->hdisplay = 720; in drm_rk1000_select_output()
250 (screen_info->mode.hdisplay == 720 && in drm_rk1000_select_output()
253 mode->hdisplay = 720; in drm_rk1000_select_output()
263 mode->hdisplay = 720; in drm_rk1000_select_output()
H A Drockchip_display.c448 mode->hdisplay = hactive; in rockchip_ofnode_get_display_mode()
449 mode->hsync_start = mode->hdisplay + hfront_porch; in rockchip_ofnode_get_display_mode()
476 mode->hdisplay = 1280; in display_get_force_timing_from_dts()
491 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, in display_get_force_timing_from_dts()
608 mode->hdisplay = 1280; in display_get_edid_mode()
708 crtc_state->crtc->active_mode.hdisplay, in display_init()
760 conn->dev->name, mode->hdisplay, mode->vdisplay, conn_state->bus_format); in display_init()
838 mode->hdisplay, mode->hsync_start, in display_init()
1023 int hdisplay, vdisplay, ret; in display_logo() local
1046 hdisplay = conn_state->mode.crtc_hdisplay; in display_logo()
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H A Dmax96755f.c44 hact = mode->hdisplay; in max96755f_mipi_dsi_rx_config()
46 hfp = mode->hsync_start - mode->hdisplay; in max96755f_mipi_dsi_rx_config()
H A Drockchip_vop.c209 u16 hdisplay = mode->crtc_hdisplay; in vop_post_config() local
211 …u16 hsize = hdisplay * (conn_state->overscan.left_margin + conn_state->overscan.right_margin) / 20… in vop_post_config()
219 hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200; in vop_post_config()
231 val |= scl_cal_scale2(hdisplay, hsize); in vop_post_config()
236 POST_HORIZONTAL_SCALEDOWN_EN(hdisplay != hsize) | in vop_post_config()
323 u16 hdisplay = mode->crtc_hdisplay; in rockchip_vop_init() local
326 u16 hact_end = hact_st + hdisplay; in rockchip_vop_init()
H A Drockchip_spl_display.c174 mode->hdisplay, mode->hsync_start, in spl_init_display()
H A Drockchip_tve.c828 screen_info->mode.hdisplay, in tve_select_output()
832 (screen_info->mode.hdisplay == 720 && in tve_select_output()
836 (screen_info->mode.hdisplay == 720 && in tve_select_output()
H A Ddw_hdmi.c1089 unsigned int hdisplay, vdisplay; in hdmi_av_composer() local
1137 hdisplay = mode->hdisplay; in hdmi_av_composer()
1138 hblank = mode->htotal - mode->hdisplay; in hdmi_av_composer()
1139 h_de_hs = mode->hsync_start - mode->hdisplay; in hdmi_av_composer()
1147 hdisplay /= 2; in hdmi_av_composer()
1187 hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1); in hdmi_av_composer()
1188 hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0); in hdmi_av_composer()
H A Drockchip_dw_hdmi_qp.c701 slice_width = DIV_ROUND_UP(mode->hdisplay, target_slices); in hdmi_dsc_get_num_slices()
891 slice_width = DIV_ROUND_UP(mode->hdisplay, slice_count); in dw_hdmi_qp_dsc_configure()
898 ret = dw_hdmi_qp_set_link_cfg(hdmi, mode->hdisplay, in dw_hdmi_qp_dsc_configure()
1199 screen_info->mode.hdisplay, in dw_hdmi_qp_select_output()
H A Drockchip_vop2.c2148 u16 hdisplay = mode->crtc_hdisplay; in vop2_setup_dly_for_vp() local
2160 pre_scan_dly = bg_dly + (roundup(hdisplay, 4) >> 2) - 1; in vop2_setup_dly_for_vp()
2162 pre_scan_dly = bg_dly + (roundup(hdisplay, 2) >> 1) - 1; in vop2_setup_dly_for_vp()
2177 u16 hdisplay = mode->crtc_hdisplay; in vop3_setup_pipe_dly() local
2184 pre_scan_dly = bg_dly + (roundup(hdisplay, 2) >> 1) - 1; in vop3_setup_pipe_dly()
2207 u16 hdisplay = mode->crtc_hdisplay; in vop2_post_config() local
2220 hsize = hdisplay; in vop2_post_config()
2225 hsize = hdisplay * (conn_state->overscan.left_margin + in vop2_post_config()
2232 hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200; in vop2_post_config()
2245 val |= scl_cal_scale2(hdisplay, hsize); in vop2_post_config()
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H A Dinno_hdmi.c443 value = mode->htotal - mode->hdisplay; in inno_hdmi_config_video_timing()
783 printf("mode:%dx%d\n", mode->hdisplay, mode->vdisplay); in rockchip_inno_hdmi_get_timing()
H A Danalogix_dp_reg.c1110 hfp = mode->hsync_start - mode->hdisplay; in analogix_dp_set_video_format()
1136 ACTIVE_PIXEL_CFG_L(mode->hdisplay)); in analogix_dp_set_video_format()
1138 ACTIVE_PIXEL_CFG_H(mode->hdisplay >> 8)); in analogix_dp_set_video_format()
H A Ddw_mipi_dsi2.c570 val = mode->hdisplay / 2; in dw_mipi_dsi2_ipi_set()
572 val = mode->hdisplay; in dw_mipi_dsi2_ipi_set()
592 hact = mode->hdisplay; in dw_mipi_dsi2_ipi_set()
/rk3399_rockchip-uboot/common/
H A Dedid.c1853 mode->hdisplay = ha; in decode_mode()
1875 mode->hdisplay, mode->hsync_start, mode->hsync_end, in decode_mode()
2324 struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh, in drm_cvt_mode() argument
2362 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); in drm_cvt_mode()
2371 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; in drm_cvt_mode()
2393 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) in drm_cvt_mode()
2395 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) in drm_cvt_mode()
2397 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) in drm_cvt_mode()
2399 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) in drm_cvt_mode()
2401 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) in drm_cvt_mode()
[all …]
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_rgb.c183 src_hactive = src->hdisplay; in rk628_bt1120_decoder_timing_cfg()
186 src_hfront_porch = src->hsync_start - src->hdisplay; in rk628_bt1120_decoder_timing_cfg()
266 SW_SET_X(mode->hdisplay)); in rk628_bt1120_decoder_enable()
H A Drk628.c331 dmode->hdisplay = vm->hactive; in rk628_display_mode_from_videomode()
332 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; in rk628_display_mode_from_videomode()
363 rk628->src_mode.clock, rk628->src_mode.hdisplay, rk628->src_mode.hsync_start, in rk628_get_video_mode()
377 rk628->dst_mode.clock, rk628->dst_mode.hdisplay, rk628->dst_mode.hsync_start, in rk628_get_video_mode()
H A Drk628_hdmirx.c239 hdmirx->mode.hdisplay = hact; in rk628_hdmirx_get_timing()
240 hdmirx->mode.hstart = hdmirx->mode.hdisplay + hfrontporch; in rk628_hdmirx_get_timing()
362 src_mode->hdisplay = hdmirx->mode.hdisplay; in rk628_hdmirx_phy_setup()
H A Drk628_post_process.c1345 src_hactive = src->hdisplay; in rk628_post_process_scaler_init()
1348 dst_hactive = dst->hdisplay; in rk628_post_process_scaler_init()
1351 dst_hfront_porch = dst->hsync_start - dst->hdisplay; in rk628_post_process_scaler_init()
1455 src->hdisplay, src->vdisplay, src->clock); in rk628_post_process_init()
1458 dst->hdisplay, dst->vdisplay, dst_rate); in rk628_post_process_init()
H A Drk628_dsi.c1168 pkt_size = VID_PKT_SIZE(mode->hdisplay / 2); in rk628_dsi_set_vid_mode()
1170 pkt_size = VID_PKT_SIZE(mode->hdisplay); in rk628_dsi_set_vid_mode()
1210 if (mode->hdisplay > 2048) in rk628_dsi_set_cmd_mode()
1211 cmd_size = EDPI_ALLOWED_CMD_SIZE(mode->hdisplay / 2); in rk628_dsi_set_cmd_mode()
1213 cmd_size = EDPI_ALLOWED_CMD_SIZE(mode->hdisplay); in rk628_dsi_set_cmd_mode()
H A Drk628.h392 int hdisplay; member
487 u32 hdisplay; member
H A Drk628_gvi.c167 vm_hactive = mode->hdisplay; in rk628_gvi_enable_color_bar()
/rk3399_rockchip-uboot/include/
H A Ddrm_modes.h229 int hdisplay; member
H A Dedid.h57 .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
829 int hdisplay; member
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/
H A Dmaxim-max96772.c360 hact = mode->hdisplay; in max96772_panel_prepare()
362 hfp = mode->hsync_start - mode->hdisplay; in max96772_panel_prepare()

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