| #
3aed61d7 |
| 12-Feb-2025 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: disable BTA during auto calculation training
when DSI operates in auto calculation mode,it sends a dsc read get_scanline request to the peripheral devices to automatically calculate
video/drm: dsi2: disable BTA during auto calculation training
when DSI operates in auto calculation mode,it sends a dsc read get_scanline request to the peripheral devices to automatically calculate phy_max_rd_time_auto during the auto calculation training. However,if the peripheral devices,such as a bridge chip or some panel, lack the capability to respond to read-back requests,they cannot respond to the DSI host’s BTA,leading to the signal control not being properly returned to the DSI host,Therefore,the BTA function should be disabled in such case.
Change-Id: If1f6925f2614fce557ef4200275b14879a29cbd1 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
edbf2db2 |
| 10-Jul-2024 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi: Add _NO_ to MIPI_DSI_* flags disabling features
As described in link:
https://patchwork.freedesktop.org/patch/msgid/20210727094435.v3.1.I629b2366a6591410359c7fcf6d385b474b705ca2@cha
video/drm: dsi: Add _NO_ to MIPI_DSI_* flags disabling features
As described in link:
https://patchwork.freedesktop.org/patch/msgid/20210727094435.v3.1.I629b2366a6591410359c7fcf6d385b474b705ca2@changeid
Many of the DSI flags have names opposite to their actual effects, e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually be disabled. Fix this by including _NO_ in the flag names, e.g. MIPI_DSI_MODE_NO_EOT_PACKET.
Change-Id: Iebabd01814d61b594fac730303bd4c659feea347 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
bac88d17 |
| 14-May-2024 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: enable hs clk once the init cmds be sent by default
the host processor to keep the HS serial clock running for the peripheral which may not generate its own clock to complete proces
video/drm: dsi2: enable hs clk once the init cmds be sent by default
the host processor to keep the HS serial clock running for the peripheral which may not generate its own clock to complete processing or pipeline movement of received data.
Change-Id: If4f6d5ed916740bd433d8c1dafd8a421e1ffa950 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
8aedf5c5 |
| 25-Mar-2024 |
Zhibin Huang <zhibin.huang@rock-chips.com> |
video/drm: dsi2: support disable hold mode in cmd mode
Type: Function Redmine ID: N/A Associated modifications: N/A Test: N/A
Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com> Change-Id: Ic
video/drm: dsi2: support disable hold mode in cmd mode
Type: Function Redmine ID: N/A Associated modifications: N/A Test: N/A
Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com> Change-Id: Ic6a3625dea08760e72adc4b61a4cdbb5e4585438
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| #
dacc7c0a |
| 03-Apr-2024 |
Zhibin Huang <zhibin.huang@rock-chips.com> |
video/drm: dsi2: normalize for dual-channel
Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com> Change-Id: I25e234bd086d051f4473dcb91c0cb428f061628b
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| #
e2dd2d6b |
| 20-Feb-2024 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: add support rk3576
Change-Id: If22460a70d9b8b9a8193afde6c15273c5ce83cd8 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
df0a5c43 |
| 06-Feb-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE
The old method to description color space and range is borrowing V4L2 defined, It's difficult to understand, so
video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE
The old method to description color space and range is borrowing V4L2 defined, It's difficult to understand, so we change to DRM defined property.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I7eacc60dfda912b9becae1ce026cdb82eebef7f8
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| #
db75a300 |
| 17-Nov-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: support Auto-Calculation mode
Change-Id: I56d06eca5201681be467042c6dff9a8834ca676c Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
5f5394ac |
| 17-Nov-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: fix IPI_RATIO_MAN_CFG in dsc mode
Change-Id: I4e9f9b4274d9ea680c0cba248e77dfe198825b07 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
a93658f8 |
| 28-Sep-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: recalculate vfrefresh after modify mode
Change-Id: I170a730b87cba57290380b30931ac05a6e9ed511 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
63faf707 |
| 16-Aug-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: havle dsc pps pic_width in dual channel dsi
<-HxV-> <------------- H/2 x V --------------> <-H x V-> ┌───────┐ ┌───────┐ ┌───────────┐ │ DSC0 ├───►│dsi0
video/drm: dsi2: havle dsc pps pic_width in dual channel dsi
<-HxV-> <------------- H/2 x V --------------> <-H x V-> ┌───────┐ ┌───────┐ ┌───────────┐ │ DSC0 ├───►│dsi0 tx├──►│lcd dsi0 rx│\ ┌───────┐ ┌─────┐ /└───────┘ └───────┘ └───────────┘ \│ │ │ │/ /│lcd DSC│ │ VP │\ ┌───────┐ ┌───────┐ ┌───────────┐/ │ │ └─────┘ \│ DSC1 ├───►│dsi1 tx├──►│lcd dsi1 rx│ └───────┘ └───────┘ └───────┘ └───────────┘
Change-Id: I340a11627cff57464a4328cc2fe8e8557dfaefe8 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
75e19c55 |
| 19-Jul-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: enable soft_te
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Change-Id: I76a32ed93612cbdb85ee25ea6f08b5d10dcd7e1b
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0f1b3c4b |
| 30-Mar-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: support get mipi_dsi_device from bridge
Change-Id: I9696915ba30cb96f686db30d7290c701c6822358 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
f4c63a2f |
| 30-Mar-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
Revert "video/drm: dsi2: add support attach bridge"
This reverts commit abf6a84c008cf2718c286166e5e706d861685e9f.
Change-Id: I265cb56d1143f48741017d4a9a6b5f03bd9f52db Signed-off-by: Guochun Huang <
Revert "video/drm: dsi2: add support attach bridge"
This reverts commit abf6a84c008cf2718c286166e5e706d861685e9f.
Change-Id: I265cb56d1143f48741017d4a9a6b5f03bd9f52db Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
c76c077d |
| 21-Mar-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: set escape clk 20MHz default
solve no response when read back from panel in video mode display
Change-Id: I622e991929c09ae109cc500795e41073487a301c Signed-off-by: Guochun Huang <he
video/drm: dsi2: set escape clk 20MHz default
solve no response when read back from panel in video mode display
Change-Id: I622e991929c09ae109cc500795e41073487a301c Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
b084e957 |
| 18-Feb-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: implement mode valid func
Change-Id: I0333213119be65dfabdd5669536fba0d7aed50f2 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
c427bbbe |
| 12-Oct-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: fix dsc configure err
Change-Id: I3039cb39e7e46c819f5b95bc5921644589294587 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
0594ce39 |
| 27-Jun-2022 |
Zhang Yubing <yubing.zhang@rock-chips.com> |
video/drm: support for multi connector
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com> Change-Id: Id87d4c81e60a9f69f3fbfc05ffd67a3d42cd21a4
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| #
abf6a84c |
| 14-Jul-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: add support attach bridge
Change-Id: Ieccc8302595191bca73d128f9dc4fd8d2f38ebea Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
c8480b92 |
| 15-Jun-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: fix DSI_VID_TX_CFG configuration errors
Change-Id: Ib31f91fa7ab3b93388ad20410f5a773c10bc1315 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
e72a3bee |
| 10-May-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: use mode->crtc_clock instead of mode->clock to calculate
Change-Id: I026639eff059a66ab9deee913053dda1b03c0812 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
79ddcdb6 |
| 10-May-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: support specified lane rate by rockchip,lane-rate in Mbps/Kbps
Change-Id: I0cebc7a89b8e88fa463d44e41d80376faabac3be Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
caf17927 |
| 30-Apr-2022 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: dsi2: get pps data and set to connector_state
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Change-Id: I594b7e90f1acb3ddf9
video/drm: dsi2: get pps data and set to connector_state
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Change-Id: I594b7e90f1acb3ddf9247ae08df721224d6a4b2a
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| #
7a63fd76 |
| 12-Mar-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: accurately set mipi channel rate to Kbps/Ksps level
Change-Id: Ie87c00d1e2e84df73fe7363247a2dd4ae0f8e5e3 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
4b4a41fb |
| 12-Mar-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: make horizontal scanning setup time more accurate
Change-Id: I2705a76c7a659913b06aa8d2829d855988ec9978 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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