| /rk3399_rockchip-uboot/drivers/video/rockchip/ |
| H A D | rk_vop.c | 42 u32 hactive = edid->hactive.typ; in rkvop_enable() local 45 writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), in rkvop_enable() 52 writel(V_DSP_WIDTH(hactive - 1) | in rkvop_enable() 62 writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir); in rkvop_enable() 66 writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir); in rkvop_enable() 71 writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir); in rkvop_enable() 75 if (hactive > 2560) in rkvop_enable() 77 else if (hactive > 1920) in rkvop_enable() 79 else if (hactive > 1280) in rkvop_enable() 146 u32 hactive = edid->hactive.typ; in rkvop_mode_set() local [all …]
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| /rk3399_rockchip-uboot/drivers/video/sunxi/ |
| H A D | lcdc.c | 90 writel(SUNXI_LCDC_X(mode->hactive.typ) | in lcdc_tcon0_mode_set() 94 total = mode->hactive.typ + mode->hfront_porch.typ + bp; in lcdc_tcon0_mode_set() 169 writel(SUNXI_LCDC_X(mode->hactive.typ) | SUNXI_LCDC_Y(yres), in lcdc_tcon1_mode_set() 171 writel(SUNXI_LCDC_X(mode->hactive.typ) | SUNXI_LCDC_Y(yres), in lcdc_tcon1_mode_set() 173 writel(SUNXI_LCDC_X(mode->hactive.typ) | SUNXI_LCDC_Y(yres), in lcdc_tcon1_mode_set() 177 total = mode->hactive.typ + mode->hfront_porch.typ + bp; in lcdc_tcon1_mode_set()
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| H A D | sunxi_de2.c | 78 u32 size = SUNXI_DE2_WH(mode->hactive.typ, mode->vactive.typ); in sunxi_de2_mode_set() 169 writel((bpp / 8) * mode->hactive.typ, &de_ui_regs->cfg[0].pitch); in sunxi_de2_mode_set() 217 uc_priv->xsize = timing.hactive.typ; in sunxi_de2_init()
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| /rk3399_rockchip-uboot/drivers/video/ |
| H A D | am335x-fb.c | 64 #define FBSIZE(x) ((x->hactive * x->vactive * x->bpp) >> 3) 136 panel->hactive, panel->vactive, panel->bpp, in am335xfb_init() 164 lcdhw->raster_timing0 = LCD_HORLSB(panel->hactive) | in am335xfb_init() 165 LCD_HORMSB(panel->hactive) | in am335xfb_init()
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| H A D | am335x-fb.h | 47 unsigned int hactive; /* Horizontal active area */ member
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| H A D | atmel_lcdfb.c | 135 value = (timing->hactive.typ * timing->vactive.typ * in atmel_fb_init() 179 value = (timing->hactive.typ - 1) << ATMEL_LCDC_HOZVAL_OFFSET; in atmel_fb_init() 221 timing.hactive.typ = panel_info.vl_col; in lcd_ctrl_init() 258 uc_priv->xsize = timing->hactive.typ; in atmel_fb_lcd_probe()
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| H A D | atmel_hlcdfb.c | 400 value |= LCDC_LCDCFG4_PPL(timing->hactive.typ - 1); in atmel_hlcdc_init() 490 uc_priv->xsize = priv->timing.hactive.typ; in atmel_hlcdc_probe() 518 if (priv->timing.hactive.typ > LCD_MAX_WIDTH) in atmel_hlcdc_ofdata_to_platdata() 519 priv->timing.hactive.typ = LCD_MAX_WIDTH; in atmel_hlcdc_ofdata_to_platdata()
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| H A D | dw_hdmi.c | 428 hdmi_write(hdmi, edid->hactive.typ >> 8, HDMI_FC_INHACTV1); in hdmi_av_composer() 429 hdmi_write(hdmi, edid->hactive.typ, HDMI_FC_INHACTV0); in hdmi_av_composer() 719 edid->pixelclock.typ, edid->hactive.typ, edid->vactive.typ); in dw_hdmi_enable()
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| H A D | tegra.c | 116 writel(dt->hactive.typ | (dt->vactive.typ << 16), &disp->disp_active); in update_display_mode() 366 priv->width = timing->hactive.typ; in tegra_lcd_ofdata_to_platdata()
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| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | rockchip_display_helper.c | 175 u16 hactive, hfp, hsync, hbp; in drm_mode_convert_to_origin_mode() local 177 hactive = mode->hdisplay; in drm_mode_convert_to_origin_mode() 184 mode->hdisplay = hactive / 2; in drm_mode_convert_to_origin_mode() 192 u16 hactive, hfp, hsync, hbp; in drm_mode_convert_to_split_mode() local 194 hactive = mode->hdisplay; in drm_mode_convert_to_split_mode() 201 mode->hdisplay = hactive * 2; in drm_mode_convert_to_split_mode()
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| H A D | drm_modes.c | 210 dmode->hdisplay = vm->hactive; in drm_display_mode_from_videomode() 249 vm->hactive = dmode->hdisplay; in drm_display_mode_to_videomode()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/video/ |
| H A D | display-timing.txt | 18 - hactive, vactive: display resolution 59 | porch # | hactive # porch | len | 82 hactive = <1920>; 102 hactive = <1920>;
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| H A D | atmel-hlcdc.txt | 32 hactive = <480>;
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| H A D | rockchip-lvds.txt | 67 hactive = <1920>;
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| /rk3399_rockchip-uboot/drivers/video/tegra124/ |
| H A D | display.c | 33 h_total = timing->hactive.typ + timing->hfront_porch.typ + in tegra_dc_calc_refresh() 51 timing->hactive.typ, timing->vactive.typ, refresh / 1000, in print_mode() 75 writel(timing->hactive.typ | (timing->vactive.typ << 16), in update_display_mode() 139 .hactive = { .typ = 16 }, 182 writel(min_mode.hactive.typ | (min_mode.vactive.typ << 16), in tegra_dc_sor_disable_win_short_raster() 236 writel(((timing->vactive.typ << 16) | timing->hactive.typ), in update_window() 239 (timing->hactive.typ * fb_bits_per_pixel / 8)), in update_window() 241 writel(((timing->hactive.typ * fb_bits_per_pixel / 8 + 31) / in update_window() 309 printf("timing->hactive.typ = %d\n", timing->hactive.typ); in dump_config() 455 uc_priv->xsize = roundup(timing.hactive.typ, 16); in tegra124_lcd_init()
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | at91sam9g45-gurnard.dts | 43 hactive = <480>; 57 hactive = <480>;
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| H A D | at91sam9x5dm.dtsi | 37 hactive = <800>;
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| H A D | am335x-pxm50.dts | 46 hactive = <1376>;
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| H A D | rk3399-evb.dts | 194 hactive = <1536>; 339 hactive = <1200>;
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| H A D | tegra20-colibri.dts | 32 hactive = <640>;
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| H A D | at91sam9263ek.dts | 115 hactive = <240>;
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| H A D | at91sam9261ek.dts | 56 hactive = <240>;
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| /rk3399_rockchip-uboot/board/BuR/common/ |
| H A D | common.c | 131 pnltmp.hactive = FDTPROP(PATHTIM, "hactive"); in load_lcdtiming() 189 pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL); in load_lcdtiming() 205 ~0UL == (pnltmp.hactive) || in load_lcdtiming() 234 pnltmp.hactive, pnltmp.vactive, pnltmp.bpp, in load_lcdtiming() 500 panel_info.vl_col = lcd_panel.hactive; in lcd_ctrl_init()
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| /rk3399_rockchip-uboot/include/ |
| H A D | drm_modes.h | 357 u32 hactive; member
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| /rk3399_rockchip-uboot/drivers/video/drm/rk628/ |
| H A D | rk628.c | 309 ofnode_read_u32(np, "hactive", &vm->hactive); in of_parse_rk628_display_timing() 331 dmode->hdisplay = vm->hactive; in rk628_display_mode_from_videomode()
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