Home
last modified time | relevance | path

Searched refs:ctrl_reg (Results 1 – 11 of 11) sorted by relevance

/rk3399_rockchip-uboot/drivers/mmc/
H A Dmvebu_mmc.c41 u32 ctrl_reg; in mvebu_mmc_setup_data() local
48 ctrl_reg = mvebu_mmc_read(SDIO_HOST_CTRL); in mvebu_mmc_setup_data()
49 ctrl_reg |= SDIO_HOST_CTRL_TMOUT(SDIO_HOST_CTRL_TMOUT_MAX); in mvebu_mmc_setup_data()
50 mvebu_mmc_write(SDIO_HOST_CTRL, ctrl_reg); in mvebu_mmc_setup_data()
282 u32 ctrl_reg = 0; in mvebu_mmc_set_bus() local
284 ctrl_reg = mvebu_mmc_read(SDIO_HOST_CTRL); in mvebu_mmc_set_bus()
285 ctrl_reg &= ~SDIO_HOST_CTRL_DATA_WIDTH_4_BITS; in mvebu_mmc_set_bus()
289 ctrl_reg |= SDIO_HOST_CTRL_DATA_WIDTH_4_BITS; in mvebu_mmc_set_bus()
293 ctrl_reg |= SDIO_HOST_CTRL_DATA_WIDTH_1_BIT; in mvebu_mmc_set_bus()
297 ctrl_reg |= SDIO_HOST_CTRL_BIG_ENDIAN; in mvebu_mmc_set_bus()
[all …]
/rk3399_rockchip-uboot/drivers/power/regulator/
H A Dpalmas_regulator.c60 adr = uc_pdata->ctrl_reg; in palmas_smps_enable()
184 adr = p->ctrl_reg; in palmas_ldo_bypass_enable()
205 adr = uc_pdata->ctrl_reg; in palmas_ldo_enable()
310 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][idx]; in palmas_ldo_probe()
315 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][9]; in palmas_ldo_probe()
318 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][10]; in palmas_ldo_probe()
379 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][0]; in palmas_smps_probe()
383 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][1]; in palmas_smps_probe()
387 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][2]; in palmas_smps_probe()
396 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx]; in palmas_smps_probe()
[all …]
H A Dlp873x_regulator.c33 adr = uc_pdata->ctrl_reg; in lp873x_buck_enable()
135 adr = uc_pdata->ctrl_reg; in lp873x_ldo_enable()
236 uc_pdata->ctrl_reg = lp873x_ldo_ctrl[idx]; in lp873x_ldo_probe()
290 uc_pdata->ctrl_reg = lp873x_buck_ctrl[idx]; in lp873x_buck_probe()
H A Dlp87565_regulator.c31 adr = uc_pdata->ctrl_reg; in lp87565_buck_enable()
146 uc_pdata->ctrl_reg = lp87565_buck_ctrl1[idx]; in lp87565_buck_probe()
/rk3399_rockchip-uboot/drivers/pinctrl/aspeed/
H A Dpinctrl_ast2500.c86 u32 *ctrl_reg; in ast2500_pinctrl_group_set() local
94 ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7]; in ast2500_pinctrl_group_set()
96 ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1]; in ast2500_pinctrl_group_set()
99 setbits_le32(ctrl_reg, config->ctrl_bit_mask); in ast2500_pinctrl_group_set()
/rk3399_rockchip-uboot/drivers/spi/
H A Dmxc_spi.c45 u32 ctrl_reg; member
95 unsigned int ctrl_reg; in spi_cfg_mxc() local
109 ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | in spi_cfg_mxc()
119 ctrl_reg |= MXC_CSPICTRL_PHA; in spi_cfg_mxc()
121 ctrl_reg |= MXC_CSPICTRL_POL; in spi_cfg_mxc()
123 ctrl_reg |= MXC_CSPICTRL_SSPOL; in spi_cfg_mxc()
124 mxcs->ctrl_reg = ctrl_reg; in spi_cfg_mxc()
208 mxcs->ctrl_reg = reg_ctrl; in spi_cfg_mxc()
231 mxcs->ctrl_reg = (mxcs->ctrl_reg & in spi_xchg_single()
235 reg_write(&regs->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN); in spi_xchg_single()
[all …]
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dcache.c103 unsigned int ctrl_reg = __before_slc_op(cacheop); in __slc_entire_op() local
112 __after_slc_op(cacheop, ctrl_reg); in __slc_entire_op()
118 unsigned int ctrl_reg = __before_slc_op(cacheop); in __slc_line_op() local
120 __after_slc_op(cacheop, ctrl_reg); in __slc_line_op()
389 unsigned int ctrl_reg = __before_dc_op(cacheop); in __dc_entire_op() local
398 __after_dc_op(cacheop, ctrl_reg); in __dc_entire_op()
404 unsigned int ctrl_reg = __before_dc_op(cacheop); in __dc_line_op() local
406 __after_dc_op(cacheop, ctrl_reg); in __dc_line_op()
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Dp2wi.c44 int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data) in p2wi_change_to_p2wi_mode() argument
50 P2WI_PM_CTRL_ADDR(ctrl_reg) | in p2wi_change_to_p2wi_mode()
/rk3399_rockchip-uboot/drivers/net/
H A Dxilinx_emaclite.c197 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phyread() local
201 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phyread()
225 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phywrite() local
230 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phywrite()
/rk3399_rockchip-uboot/include/power/
H A Dregulator.h178 u8 ctrl_reg; member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/
H A Dp2wi.h136 int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data);