1884d88bcSKeerthy /*
2884d88bcSKeerthy * (C) Copyright 2016
3884d88bcSKeerthy * Texas Instruments Incorporated, <www.ti.com>
4884d88bcSKeerthy *
5884d88bcSKeerthy * Keerthy <j-keerthy@ti.com>
6884d88bcSKeerthy *
7884d88bcSKeerthy * SPDX-License-Identifier: GPL-2.0+
8884d88bcSKeerthy */
9884d88bcSKeerthy
10884d88bcSKeerthy #include <common.h>
11884d88bcSKeerthy #include <fdtdec.h>
12884d88bcSKeerthy #include <errno.h>
13884d88bcSKeerthy #include <dm.h>
14884d88bcSKeerthy #include <i2c.h>
15884d88bcSKeerthy #include <power/pmic.h>
16884d88bcSKeerthy #include <power/regulator.h>
17884d88bcSKeerthy #include <power/palmas.h>
18884d88bcSKeerthy
19884d88bcSKeerthy DECLARE_GLOBAL_DATA_PTR;
20884d88bcSKeerthy
21884d88bcSKeerthy #define REGULATOR_ON 0x1
22884d88bcSKeerthy #define REGULATOR_OFF 0x0
23884d88bcSKeerthy
24884d88bcSKeerthy #define SMPS_MODE_MASK 0x3
25884d88bcSKeerthy #define SMPS_MODE_SHIFT 0x0
26884d88bcSKeerthy #define LDO_MODE_MASK 0x1
27884d88bcSKeerthy #define LDO_MODE_SHIFT 0x0
28884d88bcSKeerthy
29884d88bcSKeerthy static const char palmas_smps_ctrl[][PALMAS_SMPS_NUM] = {
30884d88bcSKeerthy {0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c},
31884d88bcSKeerthy {0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38},
32884d88bcSKeerthy {0x20, 0x24, 0x2c, 0x30, 0x38},
33884d88bcSKeerthy };
34884d88bcSKeerthy
35884d88bcSKeerthy static const char palmas_smps_volt[][PALMAS_SMPS_NUM] = {
36884d88bcSKeerthy {0x23, 0x27, 0x2b, 0x2f, 0x33, 0x37, 0x3b, 0x3c},
37884d88bcSKeerthy {0x23, 0x27, 0x2b, 0x2f, 0x33, 0x37, 0x3b},
38884d88bcSKeerthy {0x23, 0x27, 0x2f, 0x33, 0x3B}
39884d88bcSKeerthy };
40884d88bcSKeerthy
41884d88bcSKeerthy static const char palmas_ldo_ctrl[][PALMAS_LDO_NUM] = {
42884d88bcSKeerthy {0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e, 0x60, 0x62, 0x64},
43884d88bcSKeerthy {0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e, 0x60, 0x62, 0x64},
44884d88bcSKeerthy {0x50, 0x52, 0x54, 0x5e, 0x62}
45884d88bcSKeerthy };
46884d88bcSKeerthy
47884d88bcSKeerthy static const char palmas_ldo_volt[][PALMAS_LDO_NUM] = {
48884d88bcSKeerthy {0x51, 0x53, 0x55, 0x57, 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65},
49884d88bcSKeerthy {0x51, 0x53, 0x55, 0x57, 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65},
50884d88bcSKeerthy {0x51, 0x53, 0x55, 0x5f, 0x63}
51884d88bcSKeerthy };
52884d88bcSKeerthy
palmas_smps_enable(struct udevice * dev,int op,bool * enable)53884d88bcSKeerthy static int palmas_smps_enable(struct udevice *dev, int op, bool *enable)
54884d88bcSKeerthy {
55884d88bcSKeerthy int ret;
56884d88bcSKeerthy unsigned int adr;
57884d88bcSKeerthy struct dm_regulator_uclass_platdata *uc_pdata;
58884d88bcSKeerthy
59884d88bcSKeerthy uc_pdata = dev_get_uclass_platdata(dev);
60884d88bcSKeerthy adr = uc_pdata->ctrl_reg;
61884d88bcSKeerthy
62884d88bcSKeerthy ret = pmic_reg_read(dev->parent, adr);
63884d88bcSKeerthy if (ret < 0)
64884d88bcSKeerthy return ret;
65884d88bcSKeerthy
66884d88bcSKeerthy if (op == PMIC_OP_GET) {
67884d88bcSKeerthy ret &= PALMAS_SMPS_STATUS_MASK;
68884d88bcSKeerthy
69884d88bcSKeerthy if (ret)
70884d88bcSKeerthy *enable = true;
71884d88bcSKeerthy else
72884d88bcSKeerthy *enable = false;
73884d88bcSKeerthy
74884d88bcSKeerthy return 0;
75884d88bcSKeerthy } else if (op == PMIC_OP_SET) {
76884d88bcSKeerthy if (*enable)
77884d88bcSKeerthy ret |= PALMAS_SMPS_MODE_MASK;
78884d88bcSKeerthy else
79884d88bcSKeerthy ret &= ~(PALMAS_SMPS_MODE_MASK);
80884d88bcSKeerthy
81884d88bcSKeerthy ret = pmic_reg_write(dev->parent, adr, ret);
82884d88bcSKeerthy if (ret)
83884d88bcSKeerthy return ret;
84884d88bcSKeerthy }
85884d88bcSKeerthy
86884d88bcSKeerthy return 0;
87884d88bcSKeerthy }
88884d88bcSKeerthy
palmas_smps_volt2hex(int uV)89884d88bcSKeerthy static int palmas_smps_volt2hex(int uV)
90884d88bcSKeerthy {
91884d88bcSKeerthy if (uV > PALMAS_LDO_VOLT_MAX)
92884d88bcSKeerthy return -EINVAL;
93884d88bcSKeerthy
94884d88bcSKeerthy if (uV > 1650000)
95884d88bcSKeerthy return (uV - 1000000) / 20000 + 0x6;
96884d88bcSKeerthy
97884d88bcSKeerthy if (uV == 500000)
98884d88bcSKeerthy return 0x6;
99884d88bcSKeerthy else
100884d88bcSKeerthy return 0x6 + ((uV - 500000) / 10000);
101884d88bcSKeerthy }
102884d88bcSKeerthy
palmas_smps_hex2volt(int hex,bool range)103884d88bcSKeerthy static int palmas_smps_hex2volt(int hex, bool range)
104884d88bcSKeerthy {
105884d88bcSKeerthy unsigned int uV = 0;
106884d88bcSKeerthy
107884d88bcSKeerthy if (hex > PALMAS_SMPS_VOLT_MAX_HEX)
108884d88bcSKeerthy return -EINVAL;
109884d88bcSKeerthy
110884d88bcSKeerthy if (hex < 0x7)
111884d88bcSKeerthy uV = 500000;
112884d88bcSKeerthy else
113884d88bcSKeerthy uV = 500000 + (hex - 0x6) * 10000;
114884d88bcSKeerthy
115884d88bcSKeerthy if (range)
116884d88bcSKeerthy uV *= 2;
117884d88bcSKeerthy
118884d88bcSKeerthy return uV;
119884d88bcSKeerthy }
120884d88bcSKeerthy
palmas_smps_val(struct udevice * dev,int op,int * uV)121884d88bcSKeerthy static int palmas_smps_val(struct udevice *dev, int op, int *uV)
122884d88bcSKeerthy {
123884d88bcSKeerthy unsigned int hex, adr;
124884d88bcSKeerthy int ret;
125884d88bcSKeerthy bool range;
126884d88bcSKeerthy struct dm_regulator_uclass_platdata *uc_pdata;
127884d88bcSKeerthy
128884d88bcSKeerthy uc_pdata = dev_get_uclass_platdata(dev);
129884d88bcSKeerthy
130884d88bcSKeerthy if (op == PMIC_OP_GET)
131884d88bcSKeerthy *uV = 0;
132884d88bcSKeerthy
133884d88bcSKeerthy adr = uc_pdata->volt_reg;
134884d88bcSKeerthy
135884d88bcSKeerthy ret = pmic_reg_read(dev->parent, adr);
136884d88bcSKeerthy if (ret < 0)
137884d88bcSKeerthy return ret;
138884d88bcSKeerthy
139884d88bcSKeerthy if (op == PMIC_OP_GET) {
140884d88bcSKeerthy if (ret & PALMAS_SMPS_RANGE_MASK)
141884d88bcSKeerthy range = true;
142884d88bcSKeerthy else
143884d88bcSKeerthy range = false;
144884d88bcSKeerthy
145884d88bcSKeerthy ret &= PALMAS_SMPS_VOLT_MASK;
146884d88bcSKeerthy ret = palmas_smps_hex2volt(ret, range);
147884d88bcSKeerthy if (ret < 0)
148884d88bcSKeerthy return ret;
149884d88bcSKeerthy *uV = ret;
150884d88bcSKeerthy
151884d88bcSKeerthy return 0;
152884d88bcSKeerthy }
153884d88bcSKeerthy
154884d88bcSKeerthy hex = palmas_smps_volt2hex(*uV);
155884d88bcSKeerthy if (hex < 0)
156884d88bcSKeerthy return hex;
157884d88bcSKeerthy
158884d88bcSKeerthy ret &= ~PALMAS_SMPS_VOLT_MASK;
159884d88bcSKeerthy ret |= hex;
160884d88bcSKeerthy if (*uV > 1650000)
161884d88bcSKeerthy ret |= PALMAS_SMPS_RANGE_MASK;
162884d88bcSKeerthy
163884d88bcSKeerthy return pmic_reg_write(dev->parent, adr, ret);
164884d88bcSKeerthy }
165884d88bcSKeerthy
palmas_ldo_bypass_enable(struct udevice * dev,bool enabled)166*5c970013SJean-Jacques Hiblot static int palmas_ldo_bypass_enable(struct udevice *dev, bool enabled)
167*5c970013SJean-Jacques Hiblot {
168*5c970013SJean-Jacques Hiblot int type = dev_get_driver_data(dev_get_parent(dev));
169*5c970013SJean-Jacques Hiblot struct dm_regulator_uclass_platdata *p;
170*5c970013SJean-Jacques Hiblot unsigned int adr;
171*5c970013SJean-Jacques Hiblot int reg;
172*5c970013SJean-Jacques Hiblot
173*5c970013SJean-Jacques Hiblot if (type == TPS65917) {
174*5c970013SJean-Jacques Hiblot /* bypass available only on LDO1 and LDO2 */
175*5c970013SJean-Jacques Hiblot if (dev->driver_data > 2)
176*5c970013SJean-Jacques Hiblot return -ENOTSUPP;
177*5c970013SJean-Jacques Hiblot } else if (type == TPS659038) {
178*5c970013SJean-Jacques Hiblot /* bypass available only on LDO9 */
179*5c970013SJean-Jacques Hiblot if (dev->driver_data != 9)
180*5c970013SJean-Jacques Hiblot return -ENOTSUPP;
181*5c970013SJean-Jacques Hiblot }
182*5c970013SJean-Jacques Hiblot
183*5c970013SJean-Jacques Hiblot p = dev_get_uclass_platdata(dev);
184*5c970013SJean-Jacques Hiblot adr = p->ctrl_reg;
185*5c970013SJean-Jacques Hiblot
186*5c970013SJean-Jacques Hiblot reg = pmic_reg_read(dev->parent, adr);
187*5c970013SJean-Jacques Hiblot if (reg < 0)
188*5c970013SJean-Jacques Hiblot return reg;
189*5c970013SJean-Jacques Hiblot
190*5c970013SJean-Jacques Hiblot if (enabled)
191*5c970013SJean-Jacques Hiblot reg |= PALMAS_LDO_BYPASS_EN;
192*5c970013SJean-Jacques Hiblot else
193*5c970013SJean-Jacques Hiblot reg &= ~PALMAS_LDO_BYPASS_EN;
194*5c970013SJean-Jacques Hiblot
195*5c970013SJean-Jacques Hiblot return pmic_reg_write(dev->parent, adr, reg);
196*5c970013SJean-Jacques Hiblot }
197*5c970013SJean-Jacques Hiblot
palmas_ldo_enable(struct udevice * dev,int op,bool * enable)198884d88bcSKeerthy static int palmas_ldo_enable(struct udevice *dev, int op, bool *enable)
199884d88bcSKeerthy {
200884d88bcSKeerthy int ret;
201884d88bcSKeerthy unsigned int adr;
202884d88bcSKeerthy struct dm_regulator_uclass_platdata *uc_pdata;
203884d88bcSKeerthy
204884d88bcSKeerthy uc_pdata = dev_get_uclass_platdata(dev);
205884d88bcSKeerthy adr = uc_pdata->ctrl_reg;
206884d88bcSKeerthy
207884d88bcSKeerthy ret = pmic_reg_read(dev->parent, adr);
208884d88bcSKeerthy if (ret < 0)
209884d88bcSKeerthy return ret;
210884d88bcSKeerthy
211884d88bcSKeerthy if (op == PMIC_OP_GET) {
212884d88bcSKeerthy ret &= PALMAS_LDO_STATUS_MASK;
213884d88bcSKeerthy
214884d88bcSKeerthy if (ret)
215884d88bcSKeerthy *enable = true;
216884d88bcSKeerthy else
217884d88bcSKeerthy *enable = false;
218884d88bcSKeerthy
219884d88bcSKeerthy return 0;
220884d88bcSKeerthy } else if (op == PMIC_OP_SET) {
221884d88bcSKeerthy if (*enable)
222884d88bcSKeerthy ret |= PALMAS_LDO_MODE_MASK;
223884d88bcSKeerthy else
224884d88bcSKeerthy ret &= ~(PALMAS_LDO_MODE_MASK);
225884d88bcSKeerthy
226884d88bcSKeerthy ret = pmic_reg_write(dev->parent, adr, ret);
227884d88bcSKeerthy if (ret)
228884d88bcSKeerthy return ret;
229*5c970013SJean-Jacques Hiblot
230*5c970013SJean-Jacques Hiblot ret = palmas_ldo_bypass_enable(dev, false);
231*5c970013SJean-Jacques Hiblot if (ret && (ret != -ENOTSUPP))
232*5c970013SJean-Jacques Hiblot return ret;
233884d88bcSKeerthy }
234884d88bcSKeerthy
235884d88bcSKeerthy return 0;
236884d88bcSKeerthy }
237884d88bcSKeerthy
palmas_ldo_volt2hex(int uV)238884d88bcSKeerthy static int palmas_ldo_volt2hex(int uV)
239884d88bcSKeerthy {
240884d88bcSKeerthy if (uV > PALMAS_LDO_VOLT_MAX)
241884d88bcSKeerthy return -EINVAL;
242884d88bcSKeerthy
243884d88bcSKeerthy return (uV - 850000) / 50000;
244884d88bcSKeerthy }
245884d88bcSKeerthy
palmas_ldo_hex2volt(int hex)246884d88bcSKeerthy static int palmas_ldo_hex2volt(int hex)
247884d88bcSKeerthy {
248884d88bcSKeerthy if (hex > PALMAS_LDO_VOLT_MAX_HEX)
249884d88bcSKeerthy return -EINVAL;
250884d88bcSKeerthy
251884d88bcSKeerthy if (!hex)
252884d88bcSKeerthy return 0;
253884d88bcSKeerthy
254884d88bcSKeerthy return (hex * 50000) + 850000;
255884d88bcSKeerthy }
256884d88bcSKeerthy
palmas_ldo_val(struct udevice * dev,int op,int * uV)257884d88bcSKeerthy static int palmas_ldo_val(struct udevice *dev, int op, int *uV)
258884d88bcSKeerthy {
259884d88bcSKeerthy unsigned int hex, adr;
260884d88bcSKeerthy int ret;
261884d88bcSKeerthy
262884d88bcSKeerthy struct dm_regulator_uclass_platdata *uc_pdata;
263884d88bcSKeerthy
264884d88bcSKeerthy if (op == PMIC_OP_GET)
265884d88bcSKeerthy *uV = 0;
266884d88bcSKeerthy
267884d88bcSKeerthy uc_pdata = dev_get_uclass_platdata(dev);
268884d88bcSKeerthy
269884d88bcSKeerthy adr = uc_pdata->volt_reg;
270884d88bcSKeerthy
271884d88bcSKeerthy ret = pmic_reg_read(dev->parent, adr);
272884d88bcSKeerthy if (ret < 0)
273884d88bcSKeerthy return ret;
274884d88bcSKeerthy
275884d88bcSKeerthy if (op == PMIC_OP_GET) {
276884d88bcSKeerthy ret &= PALMAS_LDO_VOLT_MASK;
277884d88bcSKeerthy ret = palmas_ldo_hex2volt(ret);
278884d88bcSKeerthy if (ret < 0)
279884d88bcSKeerthy return ret;
280884d88bcSKeerthy *uV = ret;
281884d88bcSKeerthy return 0;
282884d88bcSKeerthy }
283884d88bcSKeerthy
284884d88bcSKeerthy hex = palmas_ldo_volt2hex(*uV);
285884d88bcSKeerthy if (hex < 0)
286884d88bcSKeerthy return hex;
287884d88bcSKeerthy
288884d88bcSKeerthy ret &= ~PALMAS_LDO_VOLT_MASK;
289884d88bcSKeerthy ret |= hex;
290884d88bcSKeerthy if (*uV > 1650000)
291884d88bcSKeerthy ret |= 0x80;
292884d88bcSKeerthy
293884d88bcSKeerthy return pmic_reg_write(dev->parent, adr, ret);
294884d88bcSKeerthy }
295884d88bcSKeerthy
palmas_ldo_probe(struct udevice * dev)296884d88bcSKeerthy static int palmas_ldo_probe(struct udevice *dev)
297884d88bcSKeerthy {
298884d88bcSKeerthy struct dm_regulator_uclass_platdata *uc_pdata;
299884d88bcSKeerthy struct udevice *parent;
300884d88bcSKeerthy
301884d88bcSKeerthy uc_pdata = dev_get_uclass_platdata(dev);
302884d88bcSKeerthy
303884d88bcSKeerthy parent = dev_get_parent(dev);
304884d88bcSKeerthy int type = dev_get_driver_data(parent);
305884d88bcSKeerthy
306884d88bcSKeerthy uc_pdata->type = REGULATOR_TYPE_LDO;
307884d88bcSKeerthy
308884d88bcSKeerthy if (dev->driver_data) {
309884d88bcSKeerthy u8 idx = dev->driver_data - 1;
310884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][idx];
311884d88bcSKeerthy uc_pdata->volt_reg = palmas_ldo_volt[type][idx];
312884d88bcSKeerthy } else {
313884d88bcSKeerthy /* check for ldoln and ldousb cases */
314884d88bcSKeerthy if (!strcmp("ldoln", dev->name)) {
315884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][9];
316884d88bcSKeerthy uc_pdata->volt_reg = palmas_ldo_volt[type][9];
317884d88bcSKeerthy } else if (!strcmp("ldousb", dev->name)) {
318884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][10];
319884d88bcSKeerthy uc_pdata->volt_reg = palmas_ldo_volt[type][10];
320884d88bcSKeerthy }
321884d88bcSKeerthy }
322884d88bcSKeerthy
323884d88bcSKeerthy return 0;
324884d88bcSKeerthy }
325884d88bcSKeerthy
ldo_get_value(struct udevice * dev)326884d88bcSKeerthy static int ldo_get_value(struct udevice *dev)
327884d88bcSKeerthy {
328884d88bcSKeerthy int uV;
329884d88bcSKeerthy int ret;
330884d88bcSKeerthy
331884d88bcSKeerthy ret = palmas_ldo_val(dev, PMIC_OP_GET, &uV);
332884d88bcSKeerthy if (ret)
333884d88bcSKeerthy return ret;
334884d88bcSKeerthy
335884d88bcSKeerthy return uV;
336884d88bcSKeerthy }
337884d88bcSKeerthy
ldo_set_value(struct udevice * dev,int uV)338884d88bcSKeerthy static int ldo_set_value(struct udevice *dev, int uV)
339884d88bcSKeerthy {
340884d88bcSKeerthy return palmas_ldo_val(dev, PMIC_OP_SET, &uV);
341884d88bcSKeerthy }
342884d88bcSKeerthy
ldo_get_enable(struct udevice * dev)3435c3195c6SKeerthy static int ldo_get_enable(struct udevice *dev)
344884d88bcSKeerthy {
345884d88bcSKeerthy bool enable = false;
346884d88bcSKeerthy int ret;
347884d88bcSKeerthy
348884d88bcSKeerthy ret = palmas_ldo_enable(dev, PMIC_OP_GET, &enable);
349884d88bcSKeerthy if (ret)
350884d88bcSKeerthy return ret;
351884d88bcSKeerthy
352884d88bcSKeerthy return enable;
353884d88bcSKeerthy }
354884d88bcSKeerthy
ldo_set_enable(struct udevice * dev,bool enable)355884d88bcSKeerthy static int ldo_set_enable(struct udevice *dev, bool enable)
356884d88bcSKeerthy {
357884d88bcSKeerthy return palmas_ldo_enable(dev, PMIC_OP_SET, &enable);
358884d88bcSKeerthy }
359884d88bcSKeerthy
palmas_smps_probe(struct udevice * dev)360884d88bcSKeerthy static int palmas_smps_probe(struct udevice *dev)
361884d88bcSKeerthy {
362884d88bcSKeerthy struct dm_regulator_uclass_platdata *uc_pdata;
363884d88bcSKeerthy struct udevice *parent;
364884d88bcSKeerthy int idx;
365884d88bcSKeerthy
366884d88bcSKeerthy uc_pdata = dev_get_uclass_platdata(dev);
367884d88bcSKeerthy
368884d88bcSKeerthy parent = dev_get_parent(dev);
369884d88bcSKeerthy int type = dev_get_driver_data(parent);
370884d88bcSKeerthy
371884d88bcSKeerthy uc_pdata->type = REGULATOR_TYPE_BUCK;
372884d88bcSKeerthy
373884d88bcSKeerthy switch (type) {
374884d88bcSKeerthy case PALMAS:
375884d88bcSKeerthy case TPS659038:
376884d88bcSKeerthy switch (dev->driver_data) {
377884d88bcSKeerthy case 123:
378884d88bcSKeerthy case 12:
379884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_smps_ctrl[type][0];
380884d88bcSKeerthy uc_pdata->volt_reg = palmas_smps_volt[type][0];
381884d88bcSKeerthy break;
382884d88bcSKeerthy case 3:
383884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_smps_ctrl[type][1];
384884d88bcSKeerthy uc_pdata->volt_reg = palmas_smps_volt[type][1];
385884d88bcSKeerthy break;
386884d88bcSKeerthy case 45:
387884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_smps_ctrl[type][2];
388884d88bcSKeerthy uc_pdata->volt_reg = palmas_smps_volt[type][2];
389884d88bcSKeerthy break;
390884d88bcSKeerthy case 6:
391884d88bcSKeerthy case 7:
392884d88bcSKeerthy case 8:
393884d88bcSKeerthy case 9:
394884d88bcSKeerthy case 10:
3953064aa70SKeerthy idx = dev->driver_data - 3;
396884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx];
397884d88bcSKeerthy uc_pdata->volt_reg = palmas_smps_volt[type][idx];
398884d88bcSKeerthy break;
399884d88bcSKeerthy
400884d88bcSKeerthy default:
401884d88bcSKeerthy printf("Wrong ID for regulator\n");
402884d88bcSKeerthy }
403884d88bcSKeerthy break;
404884d88bcSKeerthy
405884d88bcSKeerthy case TPS65917:
406884d88bcSKeerthy switch (dev->driver_data) {
407884d88bcSKeerthy case 1:
408884d88bcSKeerthy case 2:
409884d88bcSKeerthy case 3:
410884d88bcSKeerthy case 4:
411884d88bcSKeerthy case 5:
412884d88bcSKeerthy idx = dev->driver_data - 1;
413884d88bcSKeerthy uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx];
414884d88bcSKeerthy uc_pdata->volt_reg = palmas_smps_volt[type][idx];
415884d88bcSKeerthy break;
41675bceb22SKeerthy case 12:
41775bceb22SKeerthy idx = 0;
41875bceb22SKeerthy uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx];
41975bceb22SKeerthy uc_pdata->volt_reg = palmas_smps_volt[type][idx];
42075bceb22SKeerthy break;
421884d88bcSKeerthy default:
422884d88bcSKeerthy printf("Wrong ID for regulator\n");
423884d88bcSKeerthy }
424884d88bcSKeerthy break;
425884d88bcSKeerthy
426884d88bcSKeerthy default:
427884d88bcSKeerthy printf("Invalid PMIC ID\n");
428884d88bcSKeerthy }
429884d88bcSKeerthy
430884d88bcSKeerthy return 0;
431884d88bcSKeerthy }
432884d88bcSKeerthy
smps_get_value(struct udevice * dev)433884d88bcSKeerthy static int smps_get_value(struct udevice *dev)
434884d88bcSKeerthy {
435884d88bcSKeerthy int uV;
436884d88bcSKeerthy int ret;
437884d88bcSKeerthy
438884d88bcSKeerthy ret = palmas_smps_val(dev, PMIC_OP_GET, &uV);
439884d88bcSKeerthy if (ret)
440884d88bcSKeerthy return ret;
441884d88bcSKeerthy
442884d88bcSKeerthy return uV;
443884d88bcSKeerthy }
444884d88bcSKeerthy
smps_set_value(struct udevice * dev,int uV)445884d88bcSKeerthy static int smps_set_value(struct udevice *dev, int uV)
446884d88bcSKeerthy {
447884d88bcSKeerthy return palmas_smps_val(dev, PMIC_OP_SET, &uV);
448884d88bcSKeerthy }
449884d88bcSKeerthy
smps_get_enable(struct udevice * dev)4505c3195c6SKeerthy static int smps_get_enable(struct udevice *dev)
451884d88bcSKeerthy {
452884d88bcSKeerthy bool enable = false;
453884d88bcSKeerthy int ret;
454884d88bcSKeerthy
455884d88bcSKeerthy ret = palmas_smps_enable(dev, PMIC_OP_GET, &enable);
456884d88bcSKeerthy if (ret)
457884d88bcSKeerthy return ret;
458884d88bcSKeerthy
459884d88bcSKeerthy return enable;
460884d88bcSKeerthy }
461884d88bcSKeerthy
smps_set_enable(struct udevice * dev,bool enable)462884d88bcSKeerthy static int smps_set_enable(struct udevice *dev, bool enable)
463884d88bcSKeerthy {
464884d88bcSKeerthy return palmas_smps_enable(dev, PMIC_OP_SET, &enable);
465884d88bcSKeerthy }
466884d88bcSKeerthy
467884d88bcSKeerthy static const struct dm_regulator_ops palmas_ldo_ops = {
468884d88bcSKeerthy .get_value = ldo_get_value,
469884d88bcSKeerthy .set_value = ldo_set_value,
470884d88bcSKeerthy .get_enable = ldo_get_enable,
471884d88bcSKeerthy .set_enable = ldo_set_enable,
472884d88bcSKeerthy };
473884d88bcSKeerthy
474884d88bcSKeerthy U_BOOT_DRIVER(palmas_ldo) = {
475884d88bcSKeerthy .name = PALMAS_LDO_DRIVER,
476884d88bcSKeerthy .id = UCLASS_REGULATOR,
477884d88bcSKeerthy .ops = &palmas_ldo_ops,
478884d88bcSKeerthy .probe = palmas_ldo_probe,
479884d88bcSKeerthy };
480884d88bcSKeerthy
481884d88bcSKeerthy static const struct dm_regulator_ops palmas_smps_ops = {
482884d88bcSKeerthy .get_value = smps_get_value,
483884d88bcSKeerthy .set_value = smps_set_value,
484884d88bcSKeerthy .get_enable = smps_get_enable,
485884d88bcSKeerthy .set_enable = smps_set_enable,
486884d88bcSKeerthy };
487884d88bcSKeerthy
488884d88bcSKeerthy U_BOOT_DRIVER(palmas_smps) = {
489884d88bcSKeerthy .name = PALMAS_SMPS_DRIVER,
490884d88bcSKeerthy .id = UCLASS_REGULATOR,
491884d88bcSKeerthy .ops = &palmas_smps_ops,
492884d88bcSKeerthy .probe = palmas_smps_probe,
493884d88bcSKeerthy };
494