| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | gen_atmel_mci.c | 94 u32 clkdiv = 255; local
103 clkdiv = DIV_ROUND_UP(bus_hz, hz) - 2;
104 if (clkdiv > 511)
105 clkdiv = 511;
107 clkodd = clkdiv & 1;
108 clkdiv >>= 1;
111 bus_hz / (clkdiv * 2 + clkodd + 2), blklen);
114 for (clkdiv = 0; clkdiv < 255; clkdiv++) {
115 if ((bus_hz / (clkdiv + 1) / 2) <= hz)
119 (bus_hz / (clkdiv + 1)) / 2, blklen);
[all …]
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| H A D | arm_pl180_mmci.c | 287 u32 clkdiv = 0; in host_set_ios() local
291 clkdiv = 0; in host_set_ios()
294 clkdiv = (host->clock_in / dev->clock) - 2; in host_set_ios()
297 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
299 clkdiv++; in host_set_ios()
300 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
303 if (clkdiv > SDI_CLKCR_CLKDIV_MASK) in host_set_ios()
304 clkdiv = SDI_CLKCR_CLKDIV_MASK; in host_set_ios()
306 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
309 sdi_clkcr |= clkdiv; in host_set_ios()
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| H A D | sh_sdhi.c | 174 u32 clkdiv, i, timeout; in sh_sdhi_clock_control() local
187 clkdiv = 0x80; in sh_sdhi_clock_control()
189 for (; clkdiv && clk >= (i << 1); (clkdiv >>= 1)) in sh_sdhi_clock_control()
192 sh_sdhi_writew(host, SDHI_CLK_CTRL, clkdiv); in sh_sdhi_clock_control()
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| /rk3399_rockchip-uboot/drivers/i2c/ |
| H A D | adi_i2c.c | 25 ureg(clkdiv);
217 u16 clkdiv = I2C_SPEED_TO_DUTY(speed); in adi_i2c_setspeed() local
220 if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN) in adi_i2c_setspeed()
222 clkdiv = (clkdiv << 8) | (clkdiv & 0xff); in adi_i2c_setspeed()
223 writew(clkdiv, &twi->clkdiv); in adi_i2c_setspeed()
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| H A D | rk_i2c.c | 90 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); in rk_i2c_show_regs()
132 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv); in rk_i2c_set_clk()
137 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); in rk_i2c_set_clk()
203 &i2c->regs->clkdiv); in rk_i2c_adapter_clk()
206 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); in rk_i2c_adapter_clk()
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| /rk3399_rockchip-uboot/board/sbc8548/ |
| H A D | sbc8548.c | 63 uint clkdiv, lbc_mhz, lcrr = CONFIG_SYS_LBC_LCRR; in local_bus_init() local
69 clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus; in local_bus_init()
71 debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz); in local_bus_init()
74 if (clkdiv == 16) { in local_bus_init()
76 } else if (clkdiv == 8) { in local_bus_init()
78 } else if (clkdiv == 4) { in local_bus_init()
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| /rk3399_rockchip-uboot/board/freescale/mpc8568mds/ |
| H A D | mpc8568mds.c | 133 uint clkdiv; in local_bus_init() local
137 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
140 if (clkdiv == 16) { in local_bus_init()
142 } else if (clkdiv == 8) { in local_bus_init()
144 } else if (clkdiv == 4) { in local_bus_init()
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| /rk3399_rockchip-uboot/board/freescale/mpc8548cds/ |
| H A D | mpc8548cds.c | 70 uint clkdiv; in local_bus_init() local
74 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
77 if (clkdiv == 16) { in local_bus_init()
79 } else if (clkdiv == 8) { in local_bus_init()
81 } else if (clkdiv == 4) { in local_bus_init()
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| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | lpc32xx_nand_mlc.c | 90 #define clkdiv(v, w, o) (((1+(clk/v)) & w) << o) macro
143 clkdiv(CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) | in lpc32xx_nand_init()
144 clkdiv(CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY, 0x1F, 19) | in lpc32xx_nand_init()
145 clkdiv(CONFIG_LPC32XX_NAND_MLC_NAND_TA, 0x07, 16) | in lpc32xx_nand_init()
146 clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_HIGH, 0x0F, 12) | in lpc32xx_nand_init()
147 clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_LOW, 0x0F, 8) | in lpc32xx_nand_init()
148 clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_HIGH, 0x0F, 4) | in lpc32xx_nand_init()
149 clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_LOW, 0x0F, 0), in lpc32xx_nand_init()
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| /rk3399_rockchip-uboot/board/freescale/mpc8569mds/ |
| H A D | mpc8569mds.c | 291 uint clkdiv; in local_bus_init() local
295 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
298 if (clkdiv == 16) in local_bus_init()
300 else if (clkdiv == 8) in local_bus_init()
302 else if (clkdiv == 4) in local_bus_init()
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| /rk3399_rockchip-uboot/board/freescale/mpc8541cds/ |
| H A D | mpc8541cds.c | 237 uint clkdiv; in local_bus_init() local
252 clkdiv = lbc->lcrr & LCRR_CLKDIV; in local_bus_init()
253 lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv; in local_bus_init()
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| /rk3399_rockchip-uboot/board/freescale/mpc8555cds/ |
| H A D | mpc8555cds.c | 235 uint clkdiv; in local_bus_init() local
250 clkdiv = lbc->lcrr & LCRR_CLKDIV; in local_bus_init()
251 lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv; in local_bus_init()
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| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | davinci_emac.c | 150 u_int32_t clkdiv; in davinci_eth_mdio_enable() local
152 clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; in davinci_eth_mdio_enable()
154 writel((clkdiv & 0xff) | in davinci_eth_mdio_enable()
418 u_int32_t clkdiv, cnt, mac_control; in davinci_eth_open() local
436 clkdiv = readl(&adap_ewrap->EWCTL); in davinci_eth_open()
501 clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; in davinci_eth_open()
502 writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, in davinci_eth_open()
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| H A D | keystone_net.c | 123 u_int32_t clkdiv; in keystone2_mdio_reset() local
126 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; in keystone2_mdio_reset()
128 writel((clkdiv & 0xffff) | MDIO_CONTROL_ENABLE | in keystone2_mdio_reset()
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| /rk3399_rockchip-uboot/board/socrates/ |
| H A D | socrates.c | 140 uint clkdiv; in local_bus_init() local
145 clkdiv = lbc->lcrr & LCRR_CLKDIV; in local_bus_init()
146 lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv; in local_bus_init()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | i2c.h | 13 u32 clkdiv; member
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | stm32mp157a-dk1-u-boot.dtsi | 88 st,clkdiv = <
|