i2c: rki2c: Add rv1126b support

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I4375550563453da4df494619b6f5356c831b4808

i2c: rk_i2c: Add nack enabled for i2c xfer

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ibc3406e0bfde099c7ef0862a01df34293fa3485f

i2c: rk: Disable irq before xfer

Protect i2c device transfer during U-Boot charge.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I30287c7c64379418ca8a26e46e71908ccfda4051

i2c: rk_i2c: Make return error differently

Change-Id: I51434e9a1c7026b8a76ae561ed2c349c1b042780
Signed-off-by: David Wu <david.wu@rock-chips.com>

i2c: rk_i2c: Add div and data hold time adapter

For 400k frequency division, 1:1 is incorrect,
change to automatic frequency division.

Change-Id: I9ed7c6f2cbe45222ce820c9af3031dd7114e1fab
Signed-of

i2c: rk_i2c: Add div and data hold time adapter

For 400k frequency division, 1:1 is incorrect,
change to automatic frequency division.

Change-Id: I9ed7c6f2cbe45222ce820c9af3031dd7114e1fab
Signed-off-by: David Wu <david.wu@rock-chips.com>

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i2c: rk_i2c: Fixed the stop issue

The best order should be stop first, then disable i2c,
not every time disable, then stop i2c.

Change-Id: I2df442f8d9912a31e662d4da33e80ed5c74f847e
Signed-off-by: D

i2c: rk_i2c: Fixed the stop issue

The best order should be stop first, then disable i2c,
not every time disable, then stop i2c.

Change-Id: I2df442f8d9912a31e662d4da33e80ed5c74f847e
Signed-off-by: David Wu <david.wu@rock-chips.com>

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i2c: rockchip: Clean ipd status if i2c transfer error

If there was an i2c transfer error like iomux error,
should clean the ipd status, it might cause kernel i2c
irq error handing.

[ 0.690749] r

i2c: rockchip: Clean ipd status if i2c transfer error

If there was an i2c transfer error like iomux error,
should clean the ipd status, it might cause kernel i2c
irq error handing.

[ 0.690749] rk3x-i2c fdd40000.i2c: irq in STATE_IDLE, ipd = 0x10

Change-Id: Ia127edada535288e9b984d6dc0dff813e6152eff
Signed-off-by: David Wu <david.wu@rock-chips.com>

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UPSTREAM: rockchip: i2c: don't sent stop bit after each message

That's not correct and it breaks SMBUS-style reads and and writes for
some chips (e.g. SYR82X/SYR83X).

Stop bit should be sent only a

UPSTREAM: rockchip: i2c: don't sent stop bit after each message

That's not correct and it breaks SMBUS-style reads and and writes for
some chips (e.g. SYR82X/SYR83X).

Stop bit should be sent only after the last message.

Change-Id: I5ded4a43ed726b7cffa35d020ef763471bd01b41
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit c9fca5ec8849b8fa16b16cece091645e7d3aa02b)

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arm: rv1108: support rk805 setting voltage

add rk805 and i2c dts node.
support rk805 i2c read and write.

Change-Id: I74d6a9f6ff5609ebdbc1a272cd044fdaa7041d7f
Signed-off-by: Elaine Zhang <zhangqing@

arm: rv1108: support rk805 setting voltage

add rk805 and i2c dts node.
support rk805 i2c read and write.

Change-Id: I74d6a9f6ff5609ebdbc1a272cd044fdaa7041d7f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

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UPSTREAM: rockchip: i2c: Convert to livetree

Update the Rockchip I2C driver to support livetree.

Change-Id: Iea1e1e9570bbe49da63f3c9b74ec40c3dfbbac48
Signed-off-by: Philipp Tomsich <philipp.tomsich

UPSTREAM: rockchip: i2c: Convert to livetree

Update the Rockchip I2C driver to support livetree.

Change-Id: Iea1e1e9570bbe49da63f3c9b74ec40c3dfbbac48
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cc91bdf8d4da6e66703a1bc99577f49ec3c7bf4a)

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rockchip: i2c: rk3228: support i2c for rk3228 SoC

Change-Id: I94e308893462928a8dd92993261c939bf1e26195
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
(cherry picked from commit 82a1cec1a4789ca34c

rockchip: i2c: rk3228: support i2c for rk3228 SoC

Change-Id: I94e308893462928a8dd92993261c939bf1e26195
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
(cherry picked from commit 82a1cec1a4789ca34c6067ad7d1b27a66c1316ac)

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rockchip: i2c: rk3328: support i2c for rk3328 SoC

Change-Id: Ibef0a50ed34f8a38a6aada8b4bb703a8b1f794d7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

Merge git://git.denx.de/u-boot-rockchip

rockchip: i2c: fix >32 byte reads

The hw can read up to 32 bytes at a time. If we need
more than one chunk, we have to enter the plain RX mode.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acke

rockchip: i2c: fix >32 byte reads

The hw can read up to 32 bytes at a time. If we need
more than one chunk, we have to enter the plain RX mode.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

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dm: Rename dev_addr..() functions

These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing function

dm: Rename dev_addr..() functions

These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

1. dev_read_addr...() - works on devices, supports flat/live tree
2. devfdt_get_addr...() - current functions, flat tree only
3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot-rockchip

rockchip: i2c: Enable i2c for rk3399

To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.

Signed-off-by: Eric Gao <eri

rockchip: i2c: Enable i2c for rk3399

To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: i2c: Add compatibles for Rockchip Cortex-A9 socs

The Cortex-A9 socs rk3066 and rk3188 share the IP but have their own
compatible values, so add them to make the i2c on these platforms acce

rockchip: i2c: Add compatibles for Rockchip Cortex-A9 socs

The Cortex-A9 socs rk3066 and rk3188 share the IP but have their own
compatible values, so add them to make the i2c on these platforms accessible.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: i2c: fix >32 byte writes

The special handling of the chip address and register address must only
happen before we send the data buffer, otherwise we will end up
inserting both of these eve

rockchip: i2c: fix >32 byte writes

The special handling of the chip address and register address must only
happen before we send the data buffer, otherwise we will end up
inserting both of these every 32 bytes.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: i2c: move register write out of inner loop

There is no point in writing intermediate values to the txdata
registers.

Also add padding to the debug logging to make it easier to read when
t

rockchip: i2c: move register write out of inner loop

There is no point in writing intermediate values to the txdata
registers.

Also add padding to the debug logging to make it easier to read when
there are leading zeroes.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: i2c: use named constant when appropriate

Make it clear that we are using the same value in two adjacent lines.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@c

rockchip: i2c: use named constant when appropriate

Make it clear that we are using the same value in two adjacent lines.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Merge git://git.denx.de/u-boot-dm

clk: convert API to match reset/mailbox style

The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a s

clk: convert API to match reset/mailbox style

The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.

Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.

test/py passes for sandbox (which invokes the dm clk test amongst
others).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: i2c: Update the driver to use the new clock ID

We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>