| /rk3399_rockchip-uboot/lib/ |
| H A D | fdtdec_common.c | 25 const int *cell; in fdtdec_get_int() local
29 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_int()
30 if (cell && len >= sizeof(int)) { in fdtdec_get_int()
31 int val = fdt32_to_cpu(cell[0]); in fdtdec_get_int()
43 const int *cell; in fdtdec_get_uint() local
47 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_uint()
48 if (cell && len >= sizeof(unsigned int)) { in fdtdec_get_uint()
49 unsigned int val = fdt32_to_cpu(cell[0]); in fdtdec_get_uint()
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| H A D | fdtdec.c | 199 const u32 *cell; in fdtdec_get_pci_addr() local
211 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_pci_addr()
212 if (!cell) in fdtdec_get_pci_addr()
221 (ulong)fdt32_to_cpu(cell[0]), in fdtdec_get_pci_addr()
222 (ulong)fdt32_to_cpu(cell[1]), in fdtdec_get_pci_addr()
223 (ulong)fdt32_to_cpu(cell[2])); in fdtdec_get_pci_addr()
224 if ((fdt32_to_cpu(*cell) & type) == type) { in fdtdec_get_pci_addr()
225 addr->phys_hi = fdt32_to_cpu(cell[0]); in fdtdec_get_pci_addr()
226 addr->phys_mid = fdt32_to_cpu(cell[1]); in fdtdec_get_pci_addr()
227 addr->phys_lo = fdt32_to_cpu(cell[1]); in fdtdec_get_pci_addr()
[all …]
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| /rk3399_rockchip-uboot/drivers/core/ |
| H A D | simple-bus.c | 31 u32 cell[3]; in simple_bus_post_bind()
34 ret = dev_read_u32_array(dev, "ranges", cell, ARRAY_SIZE(cell)); in simple_bus_post_bind()
38 plat->base = cell[0]; in simple_bus_post_bind()
39 plat->target = cell[1]; in simple_bus_post_bind()
40 plat->size = cell[2]; in simple_bus_post_bind()
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| H A D | ofnode.c | 27 const fdt32_t *cell; in ofnode_read_u32() local
30 cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), in ofnode_read_u32()
32 if (!cell || len < sizeof(int)) { in ofnode_read_u32()
36 *outp = fdt32_to_cpu(cell[0]); in ofnode_read_u32()
615 const fdt32_t *cell; in ofnode_read_pci_addr() local
627 cell = ofnode_get_property(node, propname, &len); in ofnode_read_pci_addr()
628 if (!cell) in ofnode_read_pci_addr()
637 (ulong)fdt32_to_cpu(cell[0]), in ofnode_read_pci_addr()
638 (ulong)fdt32_to_cpu(cell[1]), in ofnode_read_pci_addr()
639 (ulong)fdt32_to_cpu(cell[2])); in ofnode_read_pci_addr()
[all …]
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| /rk3399_rockchip-uboot/arch/arm/mach-socfpga/ |
| H A D | pinmux_arria10.c | 17 const u32 *cell; in do_pinctr_pin() local
22 cell = fdt_getprop(blob, child, "pinctrl-single,pins", &len); in do_pinctr_pin()
23 if (!cell || len <= 0) in do_pinctr_pin()
26 debug("%p %d\n", cell, len); in do_pinctr_pin()
28 offset = fdt32_to_cpu(*cell++); in do_pinctr_pin()
29 value = fdt32_to_cpu(*cell++); in do_pinctr_pin()
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| H A D | misc_arria10.c | 122 const u32 *cell; in find_peripheral_uart() local
127 cell = fdt_getprop(blob, child, "pinctrl-single,pins", in find_peripheral_uart()
129 if (cell != NULL) { in find_peripheral_uart()
131 offset = fdt32_to_cpu(*cell++); in find_peripheral_uart()
132 value = fdt32_to_cpu(*cell++); in find_peripheral_uart()
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| /rk3399_rockchip-uboot/common/ |
| H A D | common_fit.c | 16 const u32 *cell; in fdt_getprop_u32() local
19 cell = fdt_getprop(fdt, node, prop, &len); in fdt_getprop_u32()
20 if (!cell || len != sizeof(*cell)) in fdt_getprop_u32()
23 return fdt32_to_cpu(*cell); in fdt_getprop_u32()
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| /rk3399_rockchip-uboot/include/dm/ |
| H A D | of.h | 127 static inline u64 of_read_number(const __be32 *cell, int size) in of_read_number() argument
131 r = (r << 32) | be32_to_cpu(*(cell++)); in of_read_number()
136 static inline unsigned long of_read_ulong(const __be32 *cell, int size) in of_read_ulong() argument
139 return of_read_number(cell, size); in of_read_ulong()
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| /rk3399_rockchip-uboot/drivers/video/ |
| H A D | pwm_backlight.c | 117 const u32 *cell; in pwm_backlight_ofdata_to_platdata() local
149 cell = dev_read_prop(dev, "brightness-levels", &len); in pwm_backlight_ofdata_to_platdata()
151 if (cell && count > index) { in pwm_backlight_ofdata_to_platdata()
152 priv->default_level = fdt32_to_cpu(cell[index]); in pwm_backlight_ofdata_to_platdata()
153 priv->max_level = fdt32_to_cpu(cell[count - 1]); in pwm_backlight_ofdata_to_platdata()
155 if(fdt32_to_cpu(cell[0]) > priv->max_level) in pwm_backlight_ofdata_to_platdata()
156 priv->max_level = fdt32_to_cpu(cell[0]); in pwm_backlight_ofdata_to_platdata()
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| /rk3399_rockchip-uboot/arch/microblaze/cpu/ |
| H A D | timer.c | 51 u32 cell[2]; in timer_init() local
66 cell, ARRAY_SIZE(cell)); in timer_init()
70 irq = cell[0]; in timer_init()
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| /rk3399_rockchip-uboot/drivers/pinctrl/ath79/ |
| H A D | pinctrl_ar933x.c | 75 u32 cell[2]; in ar933x_pinctrl_get_periph_id() local
79 "interrupts", cell, ARRAY_SIZE(cell)); in ar933x_pinctrl_get_periph_id()
83 switch (cell[0]) { in ar933x_pinctrl_get_periph_id()
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| H A D | pinctrl_qca953x.c | 95 u32 cell[2]; in qca953x_pinctrl_get_periph_id() local
99 "interrupts", cell, ARRAY_SIZE(cell)); in qca953x_pinctrl_get_periph_id()
103 switch (cell[0]) { in qca953x_pinctrl_get_periph_id()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/ |
| H A D | nvidia,tegra20-gpio.txt | 9 - #gpio-cells : Should be two. The first cell is the pin number and the
10 second cell is used to specify optional parameters:
14 The first cell is the GPIO number.
15 The second cell is used to specify flags:
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| /rk3399_rockchip-uboot/arch/x86/cpu/ |
| H A D | irq.c | 92 const u32 *cell; in create_pirq_routing_table() local
153 cell = fdt_getprop(blob, node, "intel,pirq-routing", &len); in create_pirq_routing_table()
154 if (!cell || len % sizeof(struct pirq_routing)) in create_pirq_routing_table()
174 i++, cell += sizeof(struct pirq_routing) / sizeof(u32)) { in create_pirq_routing_table()
177 pr.bdf = fdt_addr_to_cpu(cell[0]); in create_pirq_routing_table()
178 pr.pin = fdt_addr_to_cpu(cell[1]); in create_pirq_routing_table()
179 pr.pirq = fdt_addr_to_cpu(cell[2]); in create_pirq_routing_table()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/misc/ |
| H A D | intel,irq-router.txt | 23 first cell is the register offset that controls the first PIRQ link routing.
24 The second cell is the total number of PIRQ links the router supports.
28 encoded as 3 cells a group for a device. The first cell is the device's PCI
30 The second cell is the PCI interrupt pin used by this device. The last cell
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| H A D | intel-lpc.txt | 9 - intel,alt-gp-smi-enable : Enable SMI sources. This cell is written to the
12 cell pairs can be provided - the first of each pair is the base address and
21 one cell for each.
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/i2c/ |
| H A D | nvidia,tegra186-bpmp-i2c.txt | 21 Single-cell integer.
24 Single-cell integer.
27 Single-cell integer.
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/pwm/ |
| H A D | tegra20-pwm.txt | 9 first cell specifies the per-chip index of the PWM to use and the second
10 cell is the period in nanoseconds.
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| /rk3399_rockchip-uboot/arch/x86/lib/ |
| H A D | mpspec.c | 297 const u32 *cell; in mptable_add_intsrc() local
307 cell = fdt_getprop(blob, dev_of_offset(dev), "intel,pirq-routing", in mptable_add_intsrc()
309 if (!cell) in mptable_add_intsrc()
324 pr.bdf = fdt_addr_to_cpu(cell[0]); in mptable_add_intsrc()
325 pr.pin = fdt_addr_to_cpu(cell[1]); in mptable_add_intsrc()
326 pr.pirq = fdt_addr_to_cpu(cell[2]); in mptable_add_intsrc()
335 cell += sizeof(struct pirq_routing) / sizeof(u32); in mptable_add_intsrc()
349 cell += sizeof(struct pirq_routing) / sizeof(u32); in mptable_add_intsrc()
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| /rk3399_rockchip-uboot/drivers/mtd/ |
| H A D | pic32_flash.c | 376 const fdt32_t *cell; in pic32_flash_probe() local
393 cell = fdt_getprop(blob, node, "reg", &len); in pic32_flash_probe()
394 if (!cell) in pic32_flash_probe()
398 addr = fdt_translate_address((void *)blob, node, cell + idx); in pic32_flash_probe()
399 size = fdt_addr_to_cpu(cell[idx + addrc]); in pic32_flash_probe()
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| H A D | renesas_rpc_hf.c | 347 const fdt32_t *cell; in rpc_hf_probe() local
355 cell = fdt_getprop(blob, node, "reg", &len); in rpc_hf_probe()
356 if (!cell) in rpc_hf_probe()
376 rpc_base = fdt_translate_address(blob, node, cell); in rpc_hf_probe()
377 flash_base = fdt_translate_address(blob, node, cell + addrc + sizec); in rpc_hf_probe()
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| /rk3399_rockchip-uboot/arch/xtensa/dts/ |
| H A D | xtfpga.dtsi | 30 /* one cell: internal irq number,
31 * two cells: second cell == 0: internal irq number
32 * second cell == 1: external irq number
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| /rk3399_rockchip-uboot/arch/arm/mach-exynos/ |
| H A D | pinmux.c | 887 u32 cell[3]; in exynos4_pinmux_decode_periph_id() local
889 err = fdtdec_get_int_array(blob, node, "interrupts", cell, in exynos4_pinmux_decode_periph_id()
890 ARRAY_SIZE(cell)); in exynos4_pinmux_decode_periph_id()
896 return cell[1]; in exynos4_pinmux_decode_periph_id()
902 u32 cell[3]; in exynos5_pinmux_decode_periph_id() local
904 err = fdtdec_get_int_array(blob, node, "interrupts", cell, in exynos5_pinmux_decode_periph_id()
905 ARRAY_SIZE(cell)); in exynos5_pinmux_decode_periph_id()
909 return cell[1]; in exynos5_pinmux_decode_periph_id()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/spi/ |
| H A D | soft-spi.txt | 17 The first cell holds the phandle of the controller and the second cell
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| /rk3399_rockchip-uboot/drivers/pinctrl/ |
| H A D | pinctrl_pic32.c | 254 u32 cell[2]; in pic32_pinctrl_get_periph_id() local
257 "interrupts", cell, ARRAY_SIZE(cell)); in pic32_pinctrl_get_periph_id()
262 switch (cell[0]) { in pic32_pinctrl_get_periph_id()
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