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Searched refs:calibration (Results 1 – 25 of 28) sorted by relevance

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/rk3399_rockchip-uboot/board/advantech/dms-ba16/
H A Dsamsung-2g.cfg9 /* Read DQS Gating calibration */
14 /* Read calibration */
17 /* Write calibration */
30 /* Complete calibration by forced measurment */
H A Dmicron-1g.cfg9 /* Read DQS Gating calibration */
14 /* Read calibration */
17 /* Write calibration */
30 /* Complete calibration by forced measurment */
/rk3399_rockchip-uboot/board/aristainetos/
H A Dmt41j128M.cfg14 * DQS gating, read delay, write delay calibration values
15 * based on calibration compare of 0x00ffff00
34 /* Complete calibration by forced measurment */
61 /* ZQ calibration */
H A Dnt5cc256m16cp.cfg13 * DQS gating, read delay, write delay calibration values
32 /* Complete calibration by forced measurment */
/rk3399_rockchip-uboot/board/ccv/xpress/
H A Dimximage.cfg98 periodic HW ZQ calibration. */
101 * For target board, may need to run write leveling calibration to fine tune
106 /* Read DQS Gating calibration */
109 /* Read calibration */
112 /* Write calibration */
129 /* Complete calibration by forced measurement: */
165 DATA 4 0x021b001c 0x04008040 /* MMDC0_MDSCR, ZQ calibration command sent to
/rk3399_rockchip-uboot/arch/arm/cpu/armv7m/
H A Dsystick-timer.c37 uint32_t calibration; member
66 cal = readl(&systick->calibration); in timer_init()
/rk3399_rockchip-uboot/board/freescale/mx6qarm2/
H A Dimximage_mx6dl.cfg154 /* DDR_PHY_P0_MPZQHWCTRL, enable on time ZQ calibration */
193 * a. DQS gating is not relevant for LPDDR2. DSQ gating calibration section
194 * should be skipped, or the write/read calibration comming after that
196 * b. The calibration code that runs for both MMDC0 & MMDC1 should be used.
313 * calibration values based on calibration compare of 0x00ffff00:
314 * Note, these calibration values are based on Freescale's board
315 * May need to run calibration on target board to fine tune these
318 /* DDR_PHY_P0_MPZQHWCTRL, enable automatic ZQ calibration */
/rk3399_rockchip-uboot/board/ge/bx50v3/
H A Dbx50v3.cfg71 /* Read DQS Gating calibration */
76 /* Read calibration */
79 /* Write calibration */
92 /* Complete calibration by forced measurment */
/rk3399_rockchip-uboot/board/seco/mx6quq7/
H A Dmx6quq7-2g.cfg96 /* DQS gating, read delay, write delay calibration values */
102 /* Read calibration */
106 /* write calibration */
110 /* Complete calibration by forced measurement: */
/rk3399_rockchip-uboot/board/freescale/mx6sxsabresd/
H A Dimximage.cfg102 /* Complete calibration by forced measurement */
126 /* DDR device ZQ calibration */
/rk3399_rockchip-uboot/board/freescale/mx6sxsabreauto/
H A Dimximage.cfg104 /* Complete calibration by forced measurement */
128 /* DDR device ZQ calibration */
/rk3399_rockchip-uboot/board/samtec/vining_2000/
H A Dimximage.cfg102 /* Complete calibration by forced measurement */
126 /* DDR device ZQ calibration */
/rk3399_rockchip-uboot/board/toradex/colibri_imx6/
H A D800mhz_2x64mx16.cfg31 /* ZQ calibration */
H A D800mhz_4x64mx16.cfg31 /* ZQ calibration */
/rk3399_rockchip-uboot/include/
H A Dlattice.h283 void calibration(void);
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A D6x_bootscript_android.txt34 …tenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration
H A D6x_bootscript_android_recovery.txt34 …tenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration
/rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/
H A Dtmu.txt25 - samsung,dc-value : Measured data calibration value (Constant 25)
/rk3399_rockchip-uboot/drivers/fpga/
H A Dlattice.c98 void calibration(void) in calibration() function
/rk3399_rockchip-uboot/board/tqc/tqma6/
H A Dtqma6q.cfg75 /* memory interface calibration values */
H A Dtqma6dl.cfg75 /* memory interface calibration values */
H A Dtqma6s.cfg75 /* memory interface calibration values */
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A DKconfig73 bool "Include dynamic DDR calibration routines"
77 Say "Y" if your board uses dynamic (per-boot) DDR calibration.
/rk3399_rockchip-uboot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg202 # bit15: 1, DDR IO ODT Unit: Drive ODT calibration values
H A Dkwbimage-lsxhl.cfg202 # bit15: 1, DDR IO ODT Unit: Drive ODT calibration values

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