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Searched refs:PLL_REFDIV_SHIFT (Results 1 – 9 of 9) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3036.h97 PLL_REFDIV_SHIFT = 0, enumerator
H A Dcru_px30.h150 PLL_REFDIV_SHIFT = 0, enumerator
H A Dcru_rk3308.h121 PLL_REFDIV_SHIFT = 0, enumerator
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_cru.h37 #define PLL_REFDIV_SHIFT 0 macro
H A Drk628_cru.c103 refdiv = (con1 & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT; in rk628_cru_clk_get_rate_pll()
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3036.c90 div->refdiv << PLL_REFDIV_SHIFT)); in rkclk_set_pll()
234 refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT; in rkclk_pll_get_rate()
H A Dclk_rk3399.c106 PLL_REFDIV_SHIFT = 0, enumerator
358 refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT; in rkclk_pll_get_rate()
395 PLL_REFDIV_MASK | PLL_REFDIV_SHIFT, in rkclk_set_pll()
398 (div->refdiv << PLL_REFDIV_SHIFT)); in rkclk_set_pll()
H A Dclk_px30.c254 rate->refdiv << PLL_REFDIV_SHIFT)); in rkclk_set_pll()
289 refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT; in rkclk_pll_get_rate()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3036/
H A Dsdram_rk3036.c344 dpll_init_cfg.refdiv << PLL_REFDIV_SHIFT)); in rkdclk_init()