Searched refs:PLL_POSTDIV2_MASK (Results 1 – 9 of 9) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3036.h | 96 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| H A D | cru_px30.h | 149 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| H A D | cru_rk3308.h | 120 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| /rk3399_rockchip-uboot/drivers/video/drm/rk628/ |
| H A D | rk628_cru.h | 32 #define PLL_POSTDIV2_MASK GENMASK(8, 6) macro
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| H A D | rk628_cru.c | 102 postdiv2 = (con1 & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rk628_cru_clk_get_rate_pll()
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 88 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
233 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
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| H A D | clk_rk3399.c | 102 PLL_POSTDIV2_MASK = 0x7 << PLL_POSTDIV2_SHIFT, enumerator
357 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
394 PLL_POSTDIV2_MASK | PLL_POSTDIV1_MASK | in rkclk_set_pll()
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| H A D | clk_px30.c | 252 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
288 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 342 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkdclk_init()
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