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Searched refs:PLL_HPLL (Results 1 – 10 of 10) sorted by relevance

/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Dast2500-scu.h8 #define PLL_HPLL 1 macro
H A Drv1126-cru.h68 #define PLL_HPLL 4 macro
H A Drk3562-cru.h16 #define PLL_HPLL 4 macro
H A Drk3568-cru.h14 #define PLL_HPLL 2 macro
/rk3399_rockchip-uboot/drivers/clk/aspeed/
H A Dclk_ast2500.c123 case PLL_HPLL: in ast2500_clk_get_rate()
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3562.c53 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3562_PLL_CON(40),
92 RK3562_CLK_DUMP(PLL_HPLL, "hpll"),
1379 case PLL_HPLL: in rk3562_clk_get_rate()
1509 case PLL_HPLL: in rk3562_clk_set_rate()
H A Dclk_rk3568.c74 [GPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PLL_CON(16),
82 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PMU_PLL_CON(16),
101 RK3568_CLK_DUMP(PLL_HPLL, "hpll", false),
385 case PLL_HPLL: in rk3568_pmuclk_get_rate()
427 case PLL_HPLL: in rk3568_pmuclk_set_rate()
3124 } else if (parent->id == PLL_HPLL) { in rk3568_dclk_vop_set_parent()
H A Dclk_rv1126.c66 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1126_PLL_CON(24),
85 RV1126_CLK_DUMP(PLL_HPLL, "hpll", true),
1632 case PLL_HPLL: in rv1126_clk_get_rate()
1754 case PLL_HPLL: in rv1126_clk_set_rate()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drv1126.dtsi901 <&cru PLL_HPLL>, <&cru ARMCLK>,
H A Drk3568.dtsi1433 <&pmucru PLL_HPLL>,