Home
last modified time | relevance | path

Searched refs:CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET (Results 1 – 11 of 11) sorted by relevance

/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xxx/
H A Dsrio.c421 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
437 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
/rk3399_rockchip-uboot/drivers/pci/
H A Dfsl_pci_init.c263 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
268 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
274 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
/rk3399_rockchip-uboot/include/configs/
H A DP2041RDB.h359 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT4240QDS.h365 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A Dcorenet_ds.h367 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT208xRDB.h447 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DB4860QDS.h521 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT102xQDS.h131 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT208xQDS.h505 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
H A DT102xRDB.h146 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
/rk3399_rockchip-uboot/scripts/
H A Dconfig_whitelist.txt2224 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET