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Searched refs:CLK_PWM0_DIV_SHIFT (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3506.h266 CLK_PWM0_DIV_SHIFT = 6, enumerator
267 CLK_PWM0_DIV_MASK = 0xf << CLK_PWM0_DIV_SHIFT,
H A Dcru_rv1126.h191 CLK_PWM0_DIV_SHIFT = 0, enumerator
H A Dcru_rk3568.h158 CLK_PWM0_DIV_SHIFT = 0, enumerator
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3506.c733 div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT; in rk3506_pwm_get_rate()
767 (div - 1) << CLK_PWM0_DIV_SHIFT); in rk3506_pwm_set_rate()
H A Dclk_rv1126.c270 div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT; in rv1126_pwm_get_pmuclk()
307 (src_clk_div - 1) << CLK_PWM0_DIV_SHIFT); in rv1126_pwm_set_pmuclk()
H A Dclk_rk3568.c293 div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT; in rk3568_pwm_get_pmuclk()
326 (src_clk_div - 1) << CLK_PWM0_DIV_SHIFT); in rk3568_pwm_set_pmuclk()