Searched refs:CLK_PWM0_DIV_SHIFT (Results 1 – 6 of 6) sorted by relevance
266 CLK_PWM0_DIV_SHIFT = 6, enumerator267 CLK_PWM0_DIV_MASK = 0xf << CLK_PWM0_DIV_SHIFT,
191 CLK_PWM0_DIV_SHIFT = 0, enumerator
158 CLK_PWM0_DIV_SHIFT = 0, enumerator
733 div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT; in rk3506_pwm_get_rate()767 (div - 1) << CLK_PWM0_DIV_SHIFT); in rk3506_pwm_set_rate()
270 div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT; in rv1126_pwm_get_pmuclk()307 (src_clk_div - 1) << CLK_PWM0_DIV_SHIFT); in rv1126_pwm_set_pmuclk()
293 div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT; in rk3568_pwm_get_pmuclk()326 (src_clk_div - 1) << CLK_PWM0_DIV_SHIFT); in rk3568_pwm_set_pmuclk()