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/rk3399_ARM-atf/docs/perf/
H A Dpsci-performance-n1sdp.rst23 .. table:: ``CPU_SUSPEND`` latencies (ns) to deepest power level in parallel (v2.14)
37 .. table:: ``CPU_SUSPEND`` latencies (ns) to deepest power level in parallel (v2.13)
51 .. table:: ``CPU_SUSPEND`` latencies (ns) to deepest power level in serial (v2.14)
65 .. table:: ``CPU_SUSPEND`` latencies (ns) to deepest power level in serial (v2.13)
82 .. table:: ``CPU_SUSPEND`` latencies (ns) to power level 0 in parallel (v2.14)
96 .. table:: ``CPU_SUSPEND`` latencies (ns) to power level 0 in parallel (v2.13)
110 .. table:: ``CPU_SUSPEND`` latencies (ns) to power level 0 in serial (v2.14)
124 .. table:: ``CPU_SUSPEND`` latencies (ns) to power level 0 in serial (v2.13)
144 .. table:: ``CPU_OFF`` latencies (ns) on all non-lead CPUs (v2.14)
158 .. table:: ``CPU_OFF`` latencies (ns) on all non-lead CPUs (v2.13)
[all …]
H A Dpsci-performance-juno.rst49 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
68 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
87 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
106 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
128 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
147 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
166 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.14)
185 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.13)
209 .. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.14)
227 .. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.13)
[all …]
/rk3399_ARM-atf/lib/zlib/
H A Dinftrees.c33 unsigned codes, code FAR * FAR *table, in inflate_table() argument
116 *(*table)++ = here; /* make a table to force an error */ in inflate_table()
117 *(*table)++ = here; in inflate_table()
196 next = *table; /* current table to fill in */ in inflate_table()
279 (*table)[low].op = (unsigned char)curr; in inflate_table()
280 (*table)[low].bits = (unsigned char)root; in inflate_table()
281 (*table)[low].val = (unsigned short)(next - *table); in inflate_table()
296 *table += used; in inflate_table()
H A Dzutil.c194 local ptr_table table[MAX_PTR]; variable
218 table[next_ptr].org_ptr = buf; in zcalloc()
223 table[next_ptr++].new_ptr = buf; in zcalloc()
238 if (ptr != table[n].new_ptr) continue; in zcfree()
240 farfree(table[n].org_ptr); in zcfree()
242 table[n-1] = table[n]; in zcfree()
H A Dinftrees.h61 unsigned codes, code FAR * FAR *table,
H A Dcrc32.c477 local void write_table(FILE *out, const z_crc_t FAR *table, int k) { in write_table() argument
482 (unsigned long)(table[n]), in write_table()
490 local void write_table32hi(FILE *out, const z_word_t FAR *table, int k) { in write_table32hi() argument
495 (unsigned long)(table[n] >> 32), in write_table32hi()
506 local void write_table64(FILE *out, const z_word_t FAR *table, int k) { in write_table64() argument
511 (unsigned long long)(table[n]), in write_table64()
/rk3399_ARM-atf/plat/rockchip/rk3576/scmi/
H A Drk3576_clk.c373 static struct pvtpll_table *rkclk_get_pvtpll_config(struct pvtpll_table *table, in rkclk_get_pvtpll_config() argument
380 if (freq_hz == table[i].rate) in rkclk_get_pvtpll_config()
381 return &table[i]; in rkclk_get_pvtpll_config()
1169 rk_scmi_clock_t *table = NULL; in rockchip_scmi_get_clock() local
1172 table = clock_table[clock_id]; in rockchip_scmi_get_clock()
1173 if (table == NULL) in rockchip_scmi_get_clock()
1177 if ((table != NULL) && (table->is_security == 0)) in rockchip_scmi_get_clock()
1178 return table; in rockchip_scmi_get_clock()
1222 rk_scmi_clock_t *table; in rockchip_opteed_clk_set_rate() local
1229 table = rockchip_scmi_get_clock(0, clk_idx); in rockchip_opteed_clk_set_rate()
[all …]
/rk3399_ARM-atf/docs/_static/css/
H A Dcustom.css10 * a table will collapse into a single whitespace,
13 .wy-table-responsive table td {
/rk3399_ARM-atf/drivers/st/pmic/
H A Dstpmic2.c91 #define DEFINE_BUCK(regu_name, ID, pd, table) { \ argument
93 .volt_table = table, \
94 .volt_table_size = ARRAY_SIZE(table), \
106 #define DEFINE_LDOx(regu_name, ID, table) { \ argument
108 .volt_table = table, \
109 .volt_table_size = ARRAY_SIZE(table), \
122 #define DEFINE_REFDDR(regu_name, ID, table) { \ argument
124 .volt_table = table, \
125 .volt_table_size = ARRAY_SIZE(table), \
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046ardb/
H A Dddr_init.c163 const struct static_table table[] = { variable
175 for (i = 0; i < ARRAY_SIZE(table); i++) { in board_static_ddr()
176 if (table[i].rate >= clk) { in board_static_ddr()
180 if (i < ARRAY_SIZE(table)) { in board_static_ddr()
181 VERBOSE("Found static setting for rate %ld\n", table[i].rate); in board_static_ddr()
182 memcpy(&priv->ddr_reg, table[i].regs, in board_static_ddr()
/rk3399_ARM-atf/docs/components/
H A Dgranule-protection-tables-design.rst14 access allowed to each security state can be seen in the table below.
16 .. list-table:: Security states and PAS access rights
47 PAS region is configured. The first step is the level 0 table, each entry in the
48 level 0 table controls access to a relatively large region in memory (GPT Block
50 mapping is used. Level 0 entry can also link to a level 1 table (GPT Table
52 region must be mapped in Level 1 table.
76 GPT setup is split into two parts: table creation and runtime initialization. In
77 the table creation step, a data structure containing information about the
92 During the table creation time, the GPT lib opportunistically fuses contiguous
132 its level 0 table in SRAM and its level 1 table(s) in DRAM.
[all …]
H A Dromlib-design.rst12 ROM. The "library at ROM" contains a jump table with the list of functions that
49 table. Also, for additional flexibility and modularity, the index file can
63 BL image --> wrapper function --> jump table entry --> library at ROM
65 The index file is used to create a jump table which is placed in ROM. Then, the
66 wrappers refer to the jump table to call the "library at ROM" functions. The
67 wrappers essentially contain a branch instruction to the jump table entry
77 the romlib jump table includes an entry for ``fn_b``, ``fn_a`` will include
89 1. ``romlib_generator.py gentbl [args]`` - Generates the jump table by parsing
92 2. ``romlib_generator.py genvar [args]`` - Generates the jump table global
93 variable (**not** the jump table itself) with the absolute address in ROM.
[all …]
H A Drmm-el3-comms-spec.rst33 .. csv-table::
95 .. csv-table::
139 This is summarized in the following table:
141 .. csv-table::
158 The following table describes possible values for the error code in x1:
160 .. csv-table::
234 error condition as described in the following table:
236 .. csv-table::
255 The following table summarizes the RMM runtime services that need to be
258 .. csv-table::
[all …]
H A Dxlat-tables-lib-v2-design.rst79 The granularity controls the translation table level to go down to when mapping
84 - using a single level-2 translation table entry;
85 - using a level-2 intermediate entry to a level-3 translation table (which
92 here, a level-3 table will need to be allocated on the fly and the level-2
93 modified to point to this new level-3 table. This has a performance cost at
139 excluding the initial lookup level translation table, which is always
148 translation table : the library will allocate as many entries as is required
349 sub-table if it is strictly necessary. This is to reduce the memory footprint of
352 The most common reason for needing a sub-table is when a specific mapping
362 on the page size, levels 0 and 1 of translation may only allow table
[all …]
/rk3399_ARM-atf/lib/xlat_tables/aarch32/
H A Dnonlpae_tables.c396 uint32_t *table, in init_xlation_table_inner() argument
408 VERBOSE("init xlat table at %p (level%1u)\n", (void *)table, level); in init_xlation_table_inner()
451 if (*table) { in init_xlation_table_inner()
452 assert((*table & 3) == SECTION_PT_PT); in init_xlation_table_inner()
453 assert(((*table & SECTION_PT_NOTSECURE) == 0U) in init_xlation_table_inner()
456 xlat_table = (*table) & in init_xlation_table_inner()
458 desc = *table; in init_xlation_table_inner()
482 *table++ = desc; in init_xlation_table_inner()
/rk3399_ARM-atf/plat/mediatek/drivers/cirq/
H A Dmt_cirq.c200 cirq_all_events.table[cirq_reg].mask |= mask; in collect_all_wakeup_events()
211 cirq_all_events.table[cirq_reg].pol |= mask; in collect_all_wakeup_events()
219 cirq_all_events.table[cirq_reg].sen |= mask; in collect_all_wakeup_events()
222 cirq_all_events.table[cirq_reg].used = 1U; in collect_all_wakeup_events()
223 cirq_all_events.table[cirq_reg].reg_num = cirq_reg; in collect_all_wakeup_events()
319 reg = &cirq_all_events.table[i]; in __cirq_fast_clone()
504 reg = &cirq_all_events.table[i]; in cirq_fast_sw_flush()
/rk3399_ARM-atf/lib/xlat_tables_v2/
H A Dxlat_tables_utils.c288 uint64_t *table; in find_xlat_table_entry() local
293 table = xlat_table_base; in find_xlat_table_entry()
308 desc = table[idx]; in find_xlat_table_entry()
323 return &table[idx]; in find_xlat_table_entry()
328 return &table[idx]; in find_xlat_table_entry()
332 table = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK); in find_xlat_table_entry()
H A Dxlat_tables_core.c45 static int xlat_table_get_index(const xlat_ctx_t *ctx, const uint64_t *table) in xlat_table_get_index() argument
48 if (ctx->tables[i] == table) in xlat_table_get_index()
72 const uint64_t *table) in xlat_table_inc_regions_count() argument
74 int idx = xlat_table_get_index(ctx, table); in xlat_table_inc_regions_count()
81 const uint64_t *table) in xlat_table_dec_regions_count() argument
83 int idx = xlat_table_get_index(ctx, table); in xlat_table_dec_regions_count()
89 static bool xlat_table_is_empty(const xlat_ctx_t *ctx, const uint64_t *table) in xlat_table_is_empty() argument
91 return ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)] == 0; in xlat_table_is_empty()
/rk3399_ARM-atf/lib/xlat_tables/
H A Dxlat_tables_private.h37 void init_xlation_table(uintptr_t base_va, uint64_t *table,
H A Dxlat_tables_common.c326 uint64_t *table, in init_xlation_table_inner() argument
391 *table++ = desc; in init_xlation_table_inner()
399 void init_xlation_table(uintptr_t base_va, uint64_t *table, in init_xlation_table() argument
414 init_xlation_table_inner(mmap, base_va, table, level); in init_xlation_table()
/rk3399_ARM-atf/tools/memory/src/memory/
H A Dprinter.py87 table = PrettyTable(
96 table.add_row(
110 print(table, "\n")
H A Dsummary.py459 table = PrettyTable(columns, junction_char="|", hrules=HEADER)
460 table.align["Module"] = "l"
463 table.align[col] = "r"
475 table.add_row(row)
483 table.add_row(subtotal_row)
485 output = table.get_string()
/rk3399_ARM-atf/drivers/nxp/auth/csf_hdr_parser/
H A Dinput_bl2_ch234 # Specify SG table address, only for (2041/3041/4080/5020/5040) with ESBC=0 - [Optional]
60 # Specify the file names of csf header and sg table. (Default :hdr.out) [Optional]
71 # Specify the output file name of sg table. (Default :sg_table.out). [Optional]
/rk3399_ARM-atf/tools/sptool/
H A Dhob.py290 Resulting table size would exceed max table size of \
291 {self.max_size}. Current table size: {self.size}."
/rk3399_ARM-atf/docs/plat/
H A Dindex.rst61 In addition to the platforms ports listed within the table of contents, there

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