Lines Matching refs:table

14 access allowed to each security state can be seen in the table below.
16 .. list-table:: Security states and PAS access rights
47 PAS region is configured. The first step is the level 0 table, each entry in the
48 level 0 table controls access to a relatively large region in memory (GPT Block
50 mapping is used. Level 0 entry can also link to a level 1 table (GPT Table
52 region must be mapped in Level 1 table.
76 GPT setup is split into two parts: table creation and runtime initialization. In
77 the table creation step, a data structure containing information about the
92 During the table creation time, the GPT lib opportunistically fuses contiguous
132 its level 0 table in SRAM and its level 1 table(s) in DRAM.
158 table entries.
187    all GPT L1 table entries(``RME_GPT_BITLOCK_BLOCK`` is 0) and are passed as zero
223 The L0 table memory has some constraints that must be taken into account.
225 * The L0 table must be aligned to either the table size or 4096 bytes, whichever
226   is greater. L0 table size is the total protected space (PPS) divided by the
233 * The L1 tables must be aligned to their size. The size of each L1 table is the
252 We can find the total L0 table size with ((PPS / L0GPTSZ) * 8)
277 Sample calculation for L1 table size and alignment
282 We can find the size of each L1 table with ((L0GPTSZ / PGS) / 2).
286 And solve to get 0x20000 bytes per L1 table.