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/rk3399_ARM-atf/drivers/qti/accesscontrol/xpu/
H A Dxpu3.c265 struct rg_partition_range *range = xpu->partition_range; in set_mpu_permissions() local
276 for (int i = 0; i < xpu->part_range_arr_size; i++, range++, owner++) { in set_mpu_permissions()
277 if (rg_num != XPU_RG_ALL && range->rg_num != rg_num) in set_mpu_permissions()
289 XPU3_RGn_REG_SPACE_SIZE * range->rg_num; in set_mpu_permissions()
291 XPU3_RGn_REG_SPACE_SIZE * range->rg_num; in set_mpu_permissions()
293 XPU3_RGn_REG_SPACE_SIZE * range->rg_num; in set_mpu_permissions()
295 XPU3_RGn_REG_SPACE_SIZE * range->rg_num; in set_mpu_permissions()
310 XPU3_RGn_REG_SPACE_SIZE * range->rg_num; in set_mpu_permissions()
317 XPU3_RGn_REG_SPACE_SIZE * range->rg_num; in set_mpu_permissions()
365 struct rg_partition_range *range = xpu->partition_range; in set_mpu_dynamic_permissions() local
[all …]
/rk3399_ARM-atf/lib/coreboot/
H A Dcoreboot_table.c99 coreboot_memrange_t *range = &coreboot_memranges[i]; in coreboot_get_memory_type() local
101 if (range->type == CB_MEM_NONE) in coreboot_get_memory_type()
103 if ((start >= range->start) && in coreboot_get_memory_type()
104 (start - range->start < range->size) && in coreboot_get_memory_type()
105 (size <= range->size - (start - range->start))) { in coreboot_get_memory_type()
106 return range->type; in coreboot_get_memory_type()
/rk3399_ARM-atf/drivers/qti/accesscontrol/
H A Daccess_control.c160 struct rg_partition_range *range; in update_master_side_mpu() local
163 range = range_base + first_index; in update_master_side_mpu()
166 for (idx = first_index; idx < last_index; idx++, range++, owner++) { in update_master_side_mpu()
168 if (range->start_addr == start_addr && in update_master_side_mpu()
169 range->end_addr == end_addr) { in update_master_side_mpu()
181 found_range = range; in update_master_side_mpu()
191 range->start_addr == 0xfffffffful && in update_master_side_mpu()
192 range->end_addr == 0xfffffffful) { in update_master_side_mpu()
194 found_range = range; in update_master_side_mpu()
220 struct mpu_ranges *range = msm_mpu_ranges; in mpu_master_mpus_range() local
[all …]
/rk3399_ARM-atf/fdts/
H A Dfvp-ve-Cortex-A5x1.dts84 freq-range = <50000000 100000000>;
93 freq-range = <5000000 50000000>;
102 freq-range = <80000000 120000000>;
111 freq-range = <23750000 165000000>;
120 freq-range = <80000000 80000000>;
129 freq-range = <25000000 60000000>;
H A Dn1sdp.dtsi159 bus-range = <0 17>;
182 bus-range = <0 17>;
H A Dn1sdp-multi-chip.dts73 bus-range = <0 0xff>;
H A Dmorello-soc.dts158 bus-range = <0 255>;
194 bus-range = <0 255>;
H A Drtsm_ve-motherboard.dtsi50 freq-range = <23750000 63500000>;
/rk3399_ARM-atf/plat/renesas/common/
H A Dplat_pm.c52 unsigned long range; in rcar_program_mailbox() local
55 range = (unsigned long)&rcar_mboxes[linear_id]; in rcar_program_mailbox()
57 flush_dcache_range(range, sizeof(range)); in rcar_program_mailbox()
/rk3399_ARM-atf/plat/renesas/rcar_gen5/
H A Dplat_pm.c34 uintptr_t range; in rcar_program_mailbox() local
43 range = (uintptr_t)(&rcar_mboxes[linear_id]); in rcar_program_mailbox()
45 flush_dcache_range(range, sizeof(mailbox_t)); in rcar_program_mailbox()
/rk3399_ARM-atf/docs/plat/
H A Dxilinx-zynqmp.rst48 With DEBUG=1, TF-A for ZynqMP uses DDR memory range instead of OCM memory range
52 above memory range will NOT be reserved in device tree.
54 To reserve the above memory range in device tree, the device tree base address
70 range OR let TF-A modify the device tree on the run.
82 When FSBL runs on RPU and TF-A is to be placed in DDR address range,
188 | 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI |
197 | 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Manage…
H A Dxilinx-versal-net.rst80 | 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI |
89 | 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Manage…
101 | 0xc2000A00-0xc2000AFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Manage…
H A Dxilinx-versal.rst139 | 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI |
148 | 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Manage…
160 | 0xc2000A00-0xc2000AFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Manage…
H A Damd-versal2.rst114 | 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI |
123 | 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Manage…
/rk3399_ARM-atf/docs/components/
H A Darm-sip-service.rst12 - Use SMC function IDs that fall in the SiP range, which are ``0xc2000000`` -
27 | | | specific FID range. The old FID range |
H A Dfirme.rst37 TF-A function ID range is ``0xC4000400`` to ``0xC4000412``.
H A Dven-el3-service.rst12 - Use SMC function IDs that fall in the vendor-specific EL3 range, which are
/rk3399_ARM-atf/tools/marvell/doimage/secure/
H A Dsec_img_8K.cfg14 # index of CSK key in the array. Valid range is 0 to 15
H A Dsec_img_7K.cfg14 # index of CSK key in the array. Valid range is 0 to 15
/rk3399_ARM-atf/tools/cot_dt2c/cot_dt2c/
H A Dcot_parser.py209 position = {k: lay[k] for k in range(numVertex)}
210 Y = [lay[k][1] for k in range(numVertex)]
217 Xn = [position[k][0] for k in range(L)]
218 Yn = [2*M-position[k][1] for k in range(L)]
257 for k in range(L):
/rk3399_ARM-atf/plat/arm/board/tc/fdts/
H A Dtc_spmc_manifest.dtsi93 /* the full secure world range */
/rk3399_ARM-atf/docs/getting_started/
H A Drt-svc-writers-guide.rst38 are allocated a range of of OENs. The OEN must be interpreted in conjunction
66 range as they need - it is not necessary to coordinate with other entities of
68 within the SiP Service calls OEN range to mean different things - as these
95 the name of the service, the range of OENs covered, the type of service and
293 ``0xC4000000``-``0xC400FFFF`` functions. Within that range, the `PSCI`_ service
/rk3399_ARM-atf/docs/design/
H A Dpsci-pd-tree.rst157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
171 is equal to the size of the range of MPIDRs allocated. This approach will
199 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/
H A Ddram_spec_timing.h59 #define range(mi, val, ma) (((ma) > (val)) ? (max(mi, val)) : (ma)) macro
/rk3399_ARM-atf/lib/romlib/
H A Dromlib_generator.py227 for item_index in range(0, len(index_file_parser.items)):

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