124dba2b3SPaul BeesleyXilinx Zynq UltraScale+ MPSoC 224dba2b3SPaul Beesley============================= 36f625747SDouglas Raillard 44def07d5SDan HandleyTrusted Firmware-A (TF-A) implements the EL3 firmware layer for Xilinx Zynq 56f625747SDouglas RaillardUltraScale + MPSoC. 64def07d5SDan HandleyThe platform only uses the runtime part of TF-A as ZynqMP already has a 76f625747SDouglas RaillardBootROM (BL1) and FSBL (BL2). 86f625747SDouglas Raillard 94def07d5SDan HandleyBL31 is TF-A. 106f625747SDouglas RaillardBL32 is an optional Secure Payload. 116f625747SDouglas RaillardBL33 is the non-secure world software (U-Boot, Linux etc). 126f625747SDouglas Raillard 136f625747SDouglas RaillardTo build: 146f625747SDouglas Raillard 156f625747SDouglas Raillard.. code:: bash 166f625747SDouglas Raillard 17e8e7cdf3SVenkatesh Yadav Abbarapu make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 186f625747SDouglas Raillard 196f625747SDouglas RaillardTo build bl32 TSP you have to rebuild bl31 too: 206f625747SDouglas Raillard 216f625747SDouglas Raillard.. code:: bash 226f625747SDouglas Raillard 23e8e7cdf3SVenkatesh Yadav Abbarapu make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd RESET_TO_BL31=1 bl31 bl32 246f625747SDouglas Raillard 25c00baeecSVenkatesh Yadav AbbarapuTo build TF-A for JTAG DCC console: 26c00baeecSVenkatesh Yadav Abbarapu 27c00baeecSVenkatesh Yadav Abbarapu.. code:: bash 28c00baeecSVenkatesh Yadav Abbarapu 29c00baeecSVenkatesh Yadav Abbarapu make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 ZYNQMP_CONSOLE=dcc 30c00baeecSVenkatesh Yadav Abbarapu 316f625747SDouglas RaillardZynqMP platform specific build options 3224dba2b3SPaul Beesley-------------------------------------- 336f625747SDouglas Raillard 34c52a142bSAkshay Belsare- ``XILINX_OF_BOARD_DTB_ADDR`` : Specifies the base address of Device tree. 356f625747SDouglas Raillard- ``ZYNQMP_ATF_MEM_BASE``: Specifies the base address of the bl31 binary. 366f625747SDouglas Raillard- ``ZYNQMP_ATF_MEM_SIZE``: Specifies the size of the memory region of the bl31 binary. 376f625747SDouglas Raillard- ``ZYNQMP_BL32_MEM_BASE``: Specifies the base address of the bl32 binary. 386f625747SDouglas Raillard- ``ZYNQMP_BL32_MEM_SIZE``: Specifies the size of the memory region of the bl32 binary. 396f625747SDouglas Raillard 406f625747SDouglas Raillard- ``ZYNQMP_CONSOLE``: Select the console driver. Options: 416f625747SDouglas Raillard 426f625747SDouglas Raillard - ``cadence``, ``cadence0``: Cadence UART 0 436f625747SDouglas Raillard - ``cadence1`` : Cadence UART 1 446f625747SDouglas Raillard 452537f072SAkshay BelsareZynqMP Debug behavior 462537f072SAkshay Belsare--------------------- 472537f072SAkshay Belsare 482537f072SAkshay BelsareWith DEBUG=1, TF-A for ZynqMP uses DDR memory range instead of OCM memory range 492537f072SAkshay Belsaredue to size constraints. 502537f072SAkshay BelsareFor DEBUG=1 configuration for ZynqMP the BL31_BASE is set to the DDR location 51c52a142bSAkshay Belsareof 0x1000 and BL31_LIMIT is set to DDR location of 0x7FFFF. By default the 52c52a142bSAkshay Belsareabove memory range will NOT be reserved in device tree. 532537f072SAkshay Belsare 54c52a142bSAkshay BelsareTo reserve the above memory range in device tree, the device tree base address 55c52a142bSAkshay Belsaremust be provided during build as, 562537f072SAkshay Belsare 572537f072SAkshay Belsaremake CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \ 58c52a142bSAkshay Belsare XILINX_OF_BOARD_DTB_ADDR=<DTB address> bl31 59c52a142bSAkshay Belsare 60c52a142bSAkshay BelsareThe default DTB base address for ZynqMP platform is 0x100000. This default value 61c52a142bSAkshay Belsareis not set in the code and to use this default address, user still needs to 62c52a142bSAkshay Belsareprovide it through the build command as above. 63c52a142bSAkshay Belsare 64c52a142bSAkshay BelsareIf the user wants to move the bl31 to a different DDR location, user can provide 65c52a142bSAkshay Belsarethe DDR address location using the build time parameters ZYNQMP_ATF_MEM_BASE and 66c52a142bSAkshay BelsareZYNQMP_ATF_MEM_SIZE. 67c52a142bSAkshay Belsare 68c52a142bSAkshay BelsareThe DDR address must be reserved in the DTB by the user, either by manually 69c52a142bSAkshay Belsareadding the reserved memory node, in the device tree, with the required address 70c52a142bSAkshay Belsarerange OR let TF-A modify the device tree on the run. 71c52a142bSAkshay Belsare 72c52a142bSAkshay BelsareTo let TF-A access and modify the device tree, the DTB address must be provided 73c52a142bSAkshay Belsareto the build command as follows, 74c52a142bSAkshay Belsare 75c52a142bSAkshay Belsaremake CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \ 76c52a142bSAkshay Belsare ZYNQMP_ATF_MEM_BASE=<DDR address> ZYNQMP_ATF_MEM_SIZE=<size> \ 77c52a142bSAkshay Belsare XILINX_OF_BOARD_DTB_ADDR=<DTB address> bl31 782537f072SAkshay Belsare 792b932f83SBelsare, AkshayDDR Address Range Usage 802b932f83SBelsare, Akshay----------------------- 812b932f83SBelsare, Akshay 822b932f83SBelsare, AkshayWhen FSBL runs on RPU and TF-A is to be placed in DDR address range, 832b932f83SBelsare, Akshaythen the user needs to make sure that the DDR address is beyond 256KB. 842b932f83SBelsare, AkshayIn the RPU view, the first 256 KB is TCM memory. 852b932f83SBelsare, Akshay 862b932f83SBelsare, AkshayFor this use case, with the minimum base address in DDR for TF-A, 872b932f83SBelsare, Akshaythe build command example is; 882b932f83SBelsare, Akshay 892b932f83SBelsare, Akshaymake CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \ 902b932f83SBelsare, Akshay ZYNQMP_ATF_MEM_BASE=0x40000 ZYNQMP_ATF_MEM_SIZE=<size> 912537f072SAkshay Belsare 9257536653SAkshay BelsareConfigurable Stack Size 9357536653SAkshay Belsare----------------------- 9457536653SAkshay Belsare 9557536653SAkshay BelsareThe stack size in TF-A for ZynqMP platform is configurable. 9657536653SAkshay BelsareThe custom package can define the desired stack size as per the requirement in 9757536653SAkshay Belsarethe make file as follows, 9857536653SAkshay Belsare 9957536653SAkshay BelsarePLATFORM_STACK_SIZE := <value> 10057536653SAkshay Belsare$(eval $(call add_define,PLATFORM_STACK_SIZE)) 10157536653SAkshay Belsare 1024def07d5SDan HandleyFSBL->TF-A Parameter Passing 10324dba2b3SPaul Beesley---------------------------- 1046f625747SDouglas Raillard 1054def07d5SDan HandleyThe FSBL populates a data structure with image information for TF-A. TF-A uses 1064def07d5SDan Handleythat data to hand off to the loaded images. The address of the handoff data 1076f625747SDouglas Raillardstructure is passed in the ``PMU_GLOBAL.GLOBAL_GEN_STORAGE6`` register. The 1084def07d5SDan Handleyregister is free to be used by other software once TF-A has brought up 1096f625747SDouglas Raillardfurther firmware images. 1106f625747SDouglas Raillard 1116f625747SDouglas RaillardPower Domain Tree 11224dba2b3SPaul Beesley----------------- 1136f625747SDouglas Raillard 1144def07d5SDan HandleyThe following power domain tree represents the power domain model used by TF-A 1154def07d5SDan Handleyfor ZynqMP: 1166f625747SDouglas Raillard 1176f625747SDouglas Raillard:: 1186f625747SDouglas Raillard 1196f625747SDouglas Raillard +-+ 1206f625747SDouglas Raillard |0| 1216f625747SDouglas Raillard +-+ 1226f625747SDouglas Raillard +-------+---+---+-------+ 1236f625747SDouglas Raillard | | | | 1246f625747SDouglas Raillard | | | | 1256f625747SDouglas Raillard v v v v 1266f625747SDouglas Raillard +-+ +-+ +-+ +-+ 1276f625747SDouglas Raillard |0| |1| |2| |3| 1286f625747SDouglas Raillard +-+ +-+ +-+ +-+ 1296f625747SDouglas Raillard 1306f625747SDouglas RaillardThe 4 leaf power domains represent the individual A53 cores, while resources 1316f625747SDouglas Raillardcommon to the cluster are grouped in the power domain on the top. 132496d7081SAmit Nagal 133496d7081SAmit NagalCUSTOM SIP service support 134496d7081SAmit Nagal-------------------------- 135496d7081SAmit Nagal 136496d7081SAmit Nagal- Dedicated SMC FID ZYNQMP_SIP_SVC_CUSTOM(0x82002000)(32-bit)/ 137496d7081SAmit Nagal (0xC2002000)(64-bit) to be used by a custom package for 138496d7081SAmit Nagal providing CUSTOM SIP service. 139496d7081SAmit Nagal 140496d7081SAmit Nagal- by default platform provides bare minimum definition for 141496d7081SAmit Nagal custom_smc_handler in this service. 142496d7081SAmit Nagal 143496d7081SAmit Nagal- to use this service, custom package should implement their 144496d7081SAmit Nagal smc handler with the name custom_smc_handler. once custom package is 145496d7081SAmit Nagal included in TF-A build, their definition of custom_smc_handler is 146496d7081SAmit Nagal enabled. 147496d7081SAmit Nagal 148496d7081SAmit NagalCustom package makefile fragment inclusion in TF-A build 149496d7081SAmit Nagal-------------------------------------------------------- 150496d7081SAmit Nagal 151496d7081SAmit Nagal- custom package is not directly part of TF-A source. 152496d7081SAmit Nagal 153496d7081SAmit Nagal- <CUSTOM_PKG_PATH> is the location at which user clones a 154496d7081SAmit Nagal custom package locally. 155496d7081SAmit Nagal 156496d7081SAmit Nagal- custom package needs to implement makefile fragment named 157496d7081SAmit Nagal custom_pkg.mk so as to get included in TF-A build. 158496d7081SAmit Nagal 159496d7081SAmit Nagal- custom_pkg.mk specify all the rules to include custom package 160496d7081SAmit Nagal specific header files, dependent libs, source files that are 161496d7081SAmit Nagal supposed to be included in TF-A build. 162496d7081SAmit Nagal 163496d7081SAmit Nagal- when <CUSTOM_PKG_PATH> is specified in TF-A build command, 164496d7081SAmit Nagal custom_pkg.mk is included from <CUSTOM_PKG_PATH> in TF-A build. 165496d7081SAmit Nagal 166496d7081SAmit Nagal- TF-A build command: 167496d7081SAmit Nagal make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 168496d7081SAmit Nagal bl31 CUSTOM_PKG_PATH=<...> 169*93163d98SPrasad Kummari 170*93163d98SPrasad KummariReference DEN0028E SMC calling convention 171*93163d98SPrasad Kummari------------------------------------------ 172*93163d98SPrasad Kummari 173*93163d98SPrasad KummariAllocated subranges of Function Identifier to SIP services 174*93163d98SPrasad Kummari------------------------------------------------------------ 175*93163d98SPrasad Kummari 176*93163d98SPrasad Kummari+-----------------------+-------------------------------------------------------+ 177*93163d98SPrasad Kummari| SMC Function | Identifier Service type | 178*93163d98SPrasad Kummari+-----------------------+-------------------------------------------------------+ 179*93163d98SPrasad Kummari| 0xC2000000-0xC200FFFF | Fast SMC64 SiP Service Calls as per SMCCC Section 6.1 | 180*93163d98SPrasad Kummari+-----------------------+-------------------------------------------------------+ 181*93163d98SPrasad Kummari 182*93163d98SPrasad KummariIPI SMC call ranges 183*93163d98SPrasad Kummari------------------- 184*93163d98SPrasad Kummari 185*93163d98SPrasad Kummari+---------------------------+-----------------------------------------------------------+ 186*93163d98SPrasad Kummari| SMC Function Identifier | Service type | 187*93163d98SPrasad Kummari+---------------------------+-----------------------------------------------------------+ 188*93163d98SPrasad Kummari| 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI | 189*93163d98SPrasad Kummari+---------------------------+-----------------------------------------------------------+ 190*93163d98SPrasad Kummari 191*93163d98SPrasad KummariPM SMC call ranges 192*93163d98SPrasad Kummari------------------ 193*93163d98SPrasad Kummari 194*93163d98SPrasad Kummari+---------------------------+---------------------------------------------------------------------------+ 195*93163d98SPrasad Kummari| SMC Function Identifier | Service type | 196*93163d98SPrasad Kummari+---------------------------+---------------------------------------------------------------------------+ 197*93163d98SPrasad Kummari| 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Management | 198*93163d98SPrasad Kummari+---------------------------+---------------------------------------------------------------------------+ 199*93163d98SPrasad Kummari 200*93163d98SPrasad KummariSMC function IDs for SiP Service queries 201*93163d98SPrasad Kummari---------------------------------------- 202*93163d98SPrasad Kummari 203*93163d98SPrasad Kummari+--------------+--------------+--------------+ 204*93163d98SPrasad Kummari| Service | Call UID | Revision | 205*93163d98SPrasad Kummari+--------------+--------------+--------------+ 206*93163d98SPrasad Kummari| SiP Service | 0x8200_FF01 | 0x8200_FF03 | 207*93163d98SPrasad Kummari+--------------+--------------+--------------+ 208*93163d98SPrasad Kummari 209*93163d98SPrasad KummariCall UID Query – Returns a unique identifier of the service provider. 210*93163d98SPrasad Kummari 211*93163d98SPrasad KummariRevision Query – Returns revision details of the service implementor. 212*93163d98SPrasad Kummari 213*93163d98SPrasad KummariCUSTOM SIP service support 214*93163d98SPrasad Kummari-------------------------- 215*93163d98SPrasad Kummari 216*93163d98SPrasad Kummari+-------------+------------+------------+ 217*93163d98SPrasad Kummari| Service | 32-bit | 64-bit | 218*93163d98SPrasad Kummari+-------------+------------+------------+ 219*93163d98SPrasad Kummari| SiP Service | 0x82002000 | 0xC2002000 | 220*93163d98SPrasad Kummari+-------------+------------+------------+ 221