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Searched refs:ep_info (Results 1 – 25 of 101) sorted by relevance

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/rk3399_ARM-atf/plat/renesas/common/
H A Dbl2_plat_mem_params_desc.c30 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
32 .ep_info.spsr = SPSR_64(MODE_EL3,
34 .ep_info.pc = BL31_BASE,
52 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
54 .ep_info.pc = BL32_BASE,
55 .ep_info.spsr = 0,
56 .ep_info.args.arg3 = (uintptr_t)fdt_blob,
69 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
71 .ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX,
73 .ep_info.pc = BL33_BASE,
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/rk3399_ARM-atf/plat/arm/common/aarch64/
H A Darm_bl2_mem_params_desc.c26 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
43 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
46 .ep_info.pc = EL3_PAYLOAD_BASE,
47 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
63 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
66 .ep_info.pc = BL31_BASE,
67 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
70 .ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
89 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
99 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
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/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl2_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
48 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
68 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
71 .ep_info.args.arg1 = HIKEY960_BL31_PLAT_PARAM_VAL,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
93 .ep_info.pc = BL32_BASE,
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/rk3399_ARM-atf/plat/marvell/armada/common/aarch64/
H A Dmarvell_bl2_mem_params_desc.c28 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
45 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
48 .ep_info.pc = EL3_PAYLOAD_BASE,
49 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
65 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
68 .ep_info.pc = BL31_BASE,
69 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
72 .ep_info.args.arg3 = MARVELL_BL31_PLAT_PARAM_VAL,
92 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
94 .ep_info.pc = BL32_BASE,
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/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_bl2_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
48 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
68 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
71 .ep_info.args.arg1 = HIKEY_BL31_PLAT_PARAM_VAL,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
93 .ep_info.pc = BL32_BASE,
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/rk3399_ARM-atf/plat/hisilicon/poplar/
H A Dbl2_plat_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
48 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
68 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
71 .ep_info.args.arg1 = POPLAR_BL31_PLAT_PARAM_VAL,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
93 .ep_info.pc = BL32_BASE,
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/rk3399_ARM-atf/plat/arm/board/corstone1000/common/
H A Dcorstone1000_bl2_mem_params_desc.c25 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
28 .ep_info.pc = BL31_BASE,
29 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
31 .ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
49 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
51 .ep_info.pc = BL32_BASE,
52 .ep_info.args.arg0 = CORSTONE1000_TOS_FW_CONFIG_BASE,
67 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
77 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
79 .ep_info.pc = BL33_BASE,
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/rk3399_ARM-atf/plat/qemu/common/
H A Dqemu_bl2_mem_params_desc.c15 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY, VERSION_2, \
37 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
40 .ep_info.pc = EL3_PAYLOAD_BASE,
41 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
54 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
57 .ep_info.pc = BL31_BASE,
58 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
61 .ep_info.args.arg1 = QEMU_BL31_PLAT_PARAM_VAL,
81 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
83 .ep_info.pc = RMM_BASE,
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H A Dqemu_bl2_setup.c314 if (GET_RW(bl_mem_params->ep_info.spsr) == MODE_RW_64) { in qemu_bl2_handle_post_image_load()
315 bl_mem_params->ep_info.args.arg1 = in qemu_bl2_handle_post_image_load()
320 bl_mem_params->ep_info.args.arg1 = in qemu_bl2_handle_post_image_load()
324 bl_mem_params->ep_info.args.arg3 = (uintptr_t)bl2_tl; in qemu_bl2_handle_post_image_load()
339 err = parse_optee_header(&bl_mem_params->ep_info, in qemu_bl2_handle_post_image_load()
357 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry(); in qemu_bl2_handle_post_image_load()
360 &bl_mem_params->ep_info)) in qemu_bl2_handle_post_image_load()
373 bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE; in qemu_bl2_handle_post_image_load()
379 bl_mem_params->ep_info.args.arg3 = ARM_PRELOADED_DTB_BASE; in qemu_bl2_handle_post_image_load()
381 bl_mem_params->ep_info.args.arg0 = in qemu_bl2_handle_post_image_load()
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/rk3399_ARM-atf/plat/socionext/uniphier/
H A Duniphier_image_desc.c31 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
45 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
48 .ep_info.pc = UNIPHIER_BL31_OFFSET,
49 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
67 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
70 .ep_info.pc = UNIPHIER_BL32_OFFSET,
71 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
85 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
88 .ep_info.pc = UNIPHIER_BL33_OFFSET,
89 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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/rk3399_ARM-atf/plat/rpi/rpi3/aarch64/
H A Drpi3_bl2_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
30 .ep_info.pc = BL31_BASE,
31 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
34 .ep_info.args.arg1 = RPI3_BL31_PLAT_PARAM_VAL,
54 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
57 .ep_info.pc = BL32_BASE,
75 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
96 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
114 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
118 .ep_info.pc = PRELOADED_BL33_BASE,
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/rk3399_ARM-atf/plat/brcm/common/
H A Dbrcm_bl2_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
43 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
46 .ep_info.pc = BL31_BASE,
47 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
50 .ep_info.args.arg3 = BRCM_BL31_PLAT_PARAM_VAL,
70 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
72 .ep_info.pc = BL32_BASE,
86 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
89 .ep_info.pc = PRELOADED_BL33_BASE,
94 .ep_info.pc = PLAT_BRCM_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rd1ae/
H A Drd1ae_bl2_mem_params_desc.c24 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
27 .ep_info.pc = BL31_BASE,
28 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
31 .ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
55 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
57 .ep_info.pc = BL32_BASE,
69 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
78 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
80 .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
/rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rdaspen/
H A Drdaspen_bl2_mem_params_desc.c16 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
19 .ep_info.pc = BL31_BASE,
20 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
23 .ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
39 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
50 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
52 .ep_info.pc = BL32_BASE,
63 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
73 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
75 .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
/rk3399_ARM-atf/plat/socionext/synquacer/
H A Dsq_image_desc.c23 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
26 .ep_info.pc = BL31_BASE,
27 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
40 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
43 .ep_info.pc = BL32_BASE,
44 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
57 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
60 .ep_info.pc = PLAT_SQ_BL33_BASE,
61 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
/rk3399_ARM-atf/plat/qti/common/src/
H A Dqti_image_desc.c23 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
26 .ep_info.pc = BL31_BASE,
27 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
40 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
43 .ep_info.pc = BL32_BASE,
44 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
57 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
60 .ep_info.pc = BL33_BASE,
61 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
/rk3399_ARM-atf/plat/imx/imx7/common/
H A Dimx7_bl2_common.c73 err = parse_optee_header(&bl_mem_params->ep_info, in bl2_plat_handle_post_image_load()
86 bl_mem_params->ep_info.args.arg0 = in bl2_plat_handle_post_image_load()
87 bl_mem_params->ep_info.args.arg1; in bl2_plat_handle_post_image_load()
88 bl_mem_params->ep_info.args.arg1 = 0; in bl2_plat_handle_post_image_load()
90 bl_mem_params->ep_info.args.arg2 = in bl2_plat_handle_post_image_load()
93 bl_mem_params->ep_info.args.arg2 = 0; in bl2_plat_handle_post_image_load()
94 bl_mem_params->ep_info.args.arg3 = 0; in bl2_plat_handle_post_image_load()
95 bl_mem_params->ep_info.spsr = imx7_get_spsr_for_bl32_entry(); in bl2_plat_handle_post_image_load()
102 pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc; in bl2_plat_handle_post_image_load()
105 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in bl2_plat_handle_post_image_load()
[all …]
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dbl2_plat_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
48 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
68 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
82 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
84 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
97 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
/rk3399_ARM-atf/plat/imx/imx8m/imx8mp/
H A Dimx8mp_bl2_mem_params_desc.c15 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
18 .ep_info.pc = BL31_BASE,
19 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
30 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
33 .ep_info.pc = BL32_BASE,
46 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
61 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
72 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
76 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
82 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/imx/imx8m/imx8mm/
H A Dimx8mm_bl2_mem_params_desc.c15 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
18 .ep_info.pc = BL31_BASE,
19 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
30 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
33 .ep_info.pc = BL32_BASE,
46 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
61 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
72 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
76 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
82 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
/rk3399_ARM-atf/plat/nxp/common/setup/aarch64/
H A Dls_bl2_mem_params_desc.c29 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
32 .ep_info.pc = BL31_BASE,
33 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
36 .ep_info.args.arg1 = LS_BL31_PLAT_PARAM_VAL,
61 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
63 .ep_info.pc = BL32_BASE,
82 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
84 .ep_info.pc = BL33_BASE,
96 .ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
/rk3399_ARM-atf/plat/st/stm32mp2/
H A Dplat_bl2_mem_params_desc.c32 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
49 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
66 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
70 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
83 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
98 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
113 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
128 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
143 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
147 .ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
/rk3399_ARM-atf/plat/arm/common/aarch32/
H A Darm_bl2_mem_params_desc.c26 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
42 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
45 .ep_info.pc = BL32_BASE,
46 .ep_info.spsr = SPSR_MODE32(MODE32_mon, SPSR_T_ARM,
59 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
70 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
73 .ep_info.pc = PRELOADED_BL33_BASE,
78 .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
/rk3399_ARM-atf/plat/st/stm32mp1/
H A Dplat_bl2_mem_params_desc.c25 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
42 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
46 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
61 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
76 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
104 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
118 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
122 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
/rk3399_ARM-atf/common/
H A Ddesc_image_load.c150 if ((EP_GET_EXE(desc_ptr->ep_info.h.attr) == EXECUTABLE) && in get_next_bl_params_from_mem_params_desc()
151 (EP_GET_FIRST_EXE(desc_ptr->ep_info.h.attr) == EP_FIRST_EXE)) { in get_next_bl_params_from_mem_params_desc()
173 assert(EP_GET_EXE(desc_ptr->ep_info.h.attr) == EXECUTABLE); in get_next_bl_params_from_mem_params_desc()
181 bl_current_exec_node->ep_info = &desc_ptr->ep_info; in get_next_bl_params_from_mem_params_desc()
286 params_node->ep_info->args.arg3 = fw_config_base; in populate_next_bl_params_config()
298 if (params_node->ep_info->args.arg1 == 0U) in populate_next_bl_params_config()
299 params_node->ep_info->args.arg1 = in populate_next_bl_params_config()
301 if (params_node->ep_info->args.arg2 == 0U) in populate_next_bl_params_config()
302 params_node->ep_info->args.arg2 = in populate_next_bl_params_config()
309 if (params_node->ep_info->args.arg0 == 0U) { in populate_next_bl_params_config()
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