314 		if (GET_RW(bl_mem_params->ep_info.spsr) == MODE_RW_64) {  in qemu_bl2_handle_post_image_load()
315 			bl_mem_params->ep_info.args.arg1 =  in qemu_bl2_handle_post_image_load()
320 			bl_mem_params->ep_info.args.arg1 =  in qemu_bl2_handle_post_image_load()
324 		bl_mem_params->ep_info.args.arg3 = (uintptr_t)bl2_tl;  in qemu_bl2_handle_post_image_load()
339 		err = parse_optee_header(&bl_mem_params->ep_info,  in qemu_bl2_handle_post_image_load()
357 		bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry();  in qemu_bl2_handle_post_image_load()
360 						   &bl_mem_params->ep_info))  in qemu_bl2_handle_post_image_load()
373 		bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE;  in qemu_bl2_handle_post_image_load()
379 		bl_mem_params->ep_info.args.arg3 = ARM_PRELOADED_DTB_BASE;  in qemu_bl2_handle_post_image_load()
381 		bl_mem_params->ep_info.args.arg0 =  in qemu_bl2_handle_post_image_load()
382 					bl_mem_params->ep_info.args.arg1;  in qemu_bl2_handle_post_image_load()
383 		bl_mem_params->ep_info.args.arg1 = 0;  in qemu_bl2_handle_post_image_load()
384 		bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE;  in qemu_bl2_handle_post_image_load()
385 		bl_mem_params->ep_info.args.arg3 = 0;  in qemu_bl2_handle_post_image_load()
394 		pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc;  in qemu_bl2_handle_post_image_load()
397 		bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();  in qemu_bl2_handle_post_image_load()
406 		bl_mem_params->ep_info.args.arg0 =  in qemu_bl2_handle_post_image_load()
408 		bl_mem_params->ep_info.args.arg1 = 0U;  in qemu_bl2_handle_post_image_load()
409 		bl_mem_params->ep_info.args.arg2 = 0U;  in qemu_bl2_handle_post_image_load()
410 		bl_mem_params->ep_info.args.arg3 = 0U;  in qemu_bl2_handle_post_image_load()
426 						    &bl_mem_params->ep_info)) {  in qemu_bl2_handle_post_image_load()
428 			bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();  in qemu_bl2_handle_post_image_load()
432 		bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();  in qemu_bl2_handle_post_image_load()
445 		bl32_mem_params->ep_info.args.arg0 =  in qemu_bl2_handle_post_image_load()