| #
48a17d71 |
| 05-Aug-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topics "fvp_rust_spmc", "juno_measured_boot", "juno_stmm_xferlist" into integration
* changes: feat(juno): change preprocessor condition for plat_get_mbedtls_heap() feat(juno)
Merge changes from topics "fvp_rust_spmc", "juno_measured_boot", "juno_stmm_xferlist" into integration
* changes: feat(juno): change preprocessor condition for plat_get_mbedtls_heap() feat(juno): change the FW_NS_HANDOFF_BASE feat(juno): boot with TRANSFER_LIST feat(juno): organize juno_stmm_manifest.dts feat(fvp): increase PLAT_ARM_SPMC_SIZE for rust-spmc feat(fvp): add StandaloneMm manifest for rust-spmc
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| #
fad88444 |
| 08-Jul-2025 |
Yeoreum Yun <yeoreum.yun@arm.com> |
feat(juno): boot with TRANSFER_LIST
This patch supports booting with TRANSFER_LIST option in juno board.
Change-Id: I6d5a8c765291c301cf1e25e1ce12d0f7058979c7 Signed-off-by: Yeoreum Yun <yeoreum.yun
feat(juno): boot with TRANSFER_LIST
This patch supports booting with TRANSFER_LIST option in juno board.
Change-Id: I6d5a8c765291c301cf1e25e1ce12d0f7058979c7 Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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| #
207ef629 |
| 20-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "arm_ethosn_npu_sip" into integration
* changes: Add SiP service to configure Arm Ethos-N NPU plat/arm/juno: Add support to use hw_config in BL31
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| #
5d5fb10f |
| 12-Feb-2021 |
Mikael Olsson <mikael.olsson@arm.com> |
plat/arm/juno: Add support to use hw_config in BL31
To make it possible to use the hw_config device tree for dynamic configuration in BL31 on the Arm Juno platform. A placeholder hw_config has been
plat/arm/juno: Add support to use hw_config in BL31
To make it possible to use the hw_config device tree for dynamic configuration in BL31 on the Arm Juno platform. A placeholder hw_config has been added that is included in the FIP and a Juno specific BL31 setup has been added to populate fconf with the hw_config.
Juno's BL2 setup has been updated to align it with the new behavior implemented in the Arm FVP platform, where fw_config is passed in arg1 to BL31 instead of soc_fw_config. The BL31 setup is expected to use the fw_config passed in arg1 to find the hw_config.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: Ib3570faa6714f92ab8451e8f1e59779dcf19c0b6
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83a2285e |
| 28-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1784 from antonio-nino-diaz-arm/an/includes-arm
plat/arm: Cleanup of includes and drivers
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bd9344f6 |
| 25-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Sanitise includes
Use full include paths like it is done for common includes.
This cleanup was started in commit d40e0e08283a ("Sanitise includes across codebase"), but it only cleaned co
plat/arm: Sanitise includes
Use full include paths like it is done for common includes.
This cleanup was started in commit d40e0e08283a ("Sanitise includes across codebase"), but it only cleaned common files and drivers. This patch does the same to Arm platforms.
Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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5acb7932 |
| 31-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1550 from danielboulby-arm/db/weakdefs
Prevent two weak definitions of the same function
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490eeb04 |
| 27-Jun-2018 |
Daniel Boulby <daniel.boulby@arm.com> |
Prevent two weak definitions of the same function
Add another level of abstraction of weak defs for arm_bl2_handle_post_image_load to prevent two weak definitions of the same function
Change-Id: Ie
Prevent two weak definitions of the same function
Add another level of abstraction of weak defs for arm_bl2_handle_post_image_load to prevent two weak definitions of the same function
Change-Id: Ie953786f43b0f88257c82956ffaa5fe0d19603db Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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5627c1ed |
| 01-Dec-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1175 from soby-mathew/sm/juno-a32-bl32-changes
Fix issues for AArch32 builds on ARM platforms
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a9f9b608 |
| 15-Nov-2017 |
Soby Mathew <soby.mathew@arm.com> |
Juno AArch32: Remove duplicate definition of bl2 platform API
The bl2_early_platform_setup() and bl2_platform_setup() were redefined for Juno AArch32 eventhough CSS platform layer had same definitio
Juno AArch32: Remove duplicate definition of bl2 platform API
The bl2_early_platform_setup() and bl2_platform_setup() were redefined for Juno AArch32 eventhough CSS platform layer had same definition for them. The CSS definitions definitions were previously restricted to EL3_PAYLOAD_BASE builds and this is now modified to include the Juno AArch32 builds as well thus allowing us to remove the duplicate definitions in Juno platform layer.
Change-Id: Ibd1d8c1428cc1d51ac0ba90f19f5208ff3278ab5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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487c869d |
| 12-Sep-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1088 from soby-mathew/sm/sds_scmi
Introduce SDS Driver
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18e279eb |
| 12-Jun-2017 |
Soby Mathew <soby.mathew@arm.com> |
CSS: Changes for SDS framework
This patch does the required changes to enable CSS platforms to build and use the SDS framework. Since SDS is always coupled with SCMI protocol, the preexisting SCMI b
CSS: Changes for SDS framework
This patch does the required changes to enable CSS platforms to build and use the SDS framework. Since SDS is always coupled with SCMI protocol, the preexisting SCMI build flag is now renamed to `CSS_USE_SCMI_SDS_DRIVER` which will enable both SCMI and SDS on CSS platforms. Also some of the workarounds applied for SCMI are now removed with SDS in place.
Change-Id: I94e8b93f05e3fe95e475c5501c25bec052588a9c Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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38fe380a |
| 27-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1000 from dp-arm/dp/aarch32-boot
juno/aarch32: Fix boot on Cortex A57 and A72
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cc47e1ad |
| 14-Jun-2017 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
juno/aarch32: Restore `SCP_BOOT_CFG_ADDR` to the cold boot value
Before BL2 loads the SCP ram firmware, `SCP_BOOT_CFG_ADDR` specifies the primary core. After the SCP ram firmware has started execut
juno/aarch32: Restore `SCP_BOOT_CFG_ADDR` to the cold boot value
Before BL2 loads the SCP ram firmware, `SCP_BOOT_CFG_ADDR` specifies the primary core. After the SCP ram firmware has started executing, `SCP_BOOT_CFG_ADDR` is modified. This is not normally an issue but the Juno AArch32 boot flow is a special case. BL1 does a warm reset into AArch32 and the core jumps to the `sp_min` entrypoint. This is effectively a `RESET_TO_SP_MIN` configuration. `sp_min` has to be able to determine the primary core and hence we need to restore `SCP_BOOT_CFG_ADDR` to the cold boot value before `sp_min` runs.
This magically worked when booting on A53 because the core index was zero and it just so happened to match with the new value in `SCP_BOOT_CFG_ADDR`.
Change-Id: I105425c680cf6238948625c1d1017b01d3517c01 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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0f22bef3 |
| 29-Apr-2017 |
Scott Branden <sbranden@users.noreply.github.com> |
Merge branch 'integration' into tf_issue_461
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484acce3 |
| 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #910 from dp-arm/dp/AArch32-juno-port
Add AArch32 support for Juno
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07570d59 |
| 14-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state: 1> BL1, in AArch64 state, loads BL2. 2> BL2, in AArch64 state, initializes DDR. L
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state: 1> BL1, in AArch64 state, loads BL2. 2> BL2, in AArch64 state, initializes DDR. Loads SP_MIN & BL33 (AArch32 executable)images. Calls RUN_IMAGE SMC to go back to BL1. 3> BL1 writes AArch32 executable opcodes, to load and branch at the entrypoint address of SP_MIN, at HI-VECTOR address and then request for warm reset in AArch32 state using RMR_EL3.
This patch makes following changes to facilitate above steps: * Added assembly function to carry out step 3 above. * Added region in TZC that enables Secure access to the HI-VECTOR(0xFFFF0000) address space. * AArch32 image descriptor is used, in BL2, to load SP_MIN and BL33 AArch32 executable images.
A new flag `JUNO_AARCH32_EL3_RUNTIME` is introduced that controls above changes. By default this flag is disabled.
NOTE: BL1 and BL2 are not supported in AArch32 state for JUNO.
Change-Id: I091d56a0e6d36663e6d9d2bb53c92c672195d1ec Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com> Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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