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/rk3399_ARM-atf/fdts/
H A Ddualroot_cot_descriptors.dts18 antirollback-counter = <&trusted_nv_ctr>;
37 antirollback-counter = <&trusted_nv_ctr>;
48 antirollback-counter = <&trusted_nv_ctr>;
59 antirollback-counter = <&trusted_nv_ctr>;
70 antirollback-counter = <&trusted_nv_ctr>;
80 antirollback-counter = <&trusted_nv_ctr>;
94 antirollback-counter = <&trusted_nv_ctr>;
105 antirollback-counter = <&trusted_nv_ctr>;
125 antirollback-counter = <&non_trusted_nv_ctr>;
140 antirollback-counter = <&trusted_nv_ctr>;
[all …]
H A Dtbbr_cot_descriptors.dts23 antirollback-counter = <&trusted_nv_ctr>;
42 antirollback-counter = <&trusted_nv_ctr>;
56 antirollback-counter = <&trusted_nv_ctr>;
67 antirollback-counter = <&trusted_nv_ctr>;
78 antirollback-counter = <&trusted_nv_ctr>;
88 antirollback-counter = <&trusted_nv_ctr>;
102 antirollback-counter = <&trusted_nv_ctr>;
113 antirollback-counter = <&trusted_nv_ctr>;
133 antirollback-counter = <&non_trusted_nv_ctr>;
144 antirollback-counter = <&non_trusted_nv_ctr>;
[all …]
H A Dstm32mp1-cot-descriptors.dtsi18 antirollback-counter = <&trusted_nv_ctr>;
32 antirollback-counter = <&trusted_nv_ctr>;
46 antirollback-counter = <&trusted_nv_ctr>;
57 antirollback-counter = <&trusted_nv_ctr>;
77 antirollback-counter = <&non_trusted_nv_ctr>;
88 antirollback-counter = <&non_trusted_nv_ctr>;
H A Dcca_cot_descriptors.dts18 antirollback-counter = <&cca_nv_ctr>;
47 antirollback-counter = <&trusted_nv_ctr>;
58 antirollback-counter = <&trusted_nv_ctr>;
72 antirollback-counter = <&non_trusted_nv_ctr>;
83 antirollback-counter = <&non_trusted_nv_ctr>;
98 antirollback-counter = <&trusted_nv_ctr>;
118 antirollback-counter = <&non_trusted_nv_ctr>;
240 compatible = "arm, non-volatile-counter";
/rk3399_ARM-atf/drivers/st/clk/
H A Dstm32mp_clkfunc.c327 static void stgen_set_counter(unsigned long long counter) in stgen_set_counter() argument
330 mmio_write_64(STGEN_BASE + CNTCV_OFF, counter); in stgen_set_counter()
332 mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)counter); in stgen_set_counter()
333 mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(counter >> 32)); in stgen_set_counter()
357 unsigned long long counter; in stm32mp_stgen_config() local
368 counter = stm32mp_stgen_get_counter() * rate / cntfid0; in stm32mp_stgen_config()
369 stgen_set_counter(counter); in stm32mp_stgen_config()
/rk3399_ARM-atf/tools/cot_dt2c/tests/
H A Dtest_invalid_missing_attribute.dtsi17 antirollback-counter = <&cca_nv_ctr>;
31 antirollback-counter = <&non_trusted_nv_ctr>;
41 antirollback-counter = <&non_trusted_nv_ctr>;
80 compatible = "arm, non-volatile-counter";
H A Dtest_invalid_undefined_parent.dtsi18 antirollback-counter = <&cca_nv_ctr>;
32 antirollback-counter = <&non_trusted_nv_ctr>;
43 antirollback-counter = <&non_trusted_nv_ctr>;
84 compatible = "arm, non-volatile-counter";
H A Dtest_invalid_missing_root.dtsi22 antirollback-counter = <&trusted_nv_ctr>;
33 antirollback-counter = <&trusted_nv_ctr>;
46 antirollback-counter = <&non_trusted_nv_ctr>;
57 antirollback-counter = <&non_trusted_nv_ctr>;
72 antirollback-counter = <&trusted_nv_ctr>;
92 antirollback-counter = <&non_trusted_nv_ctr>;
214 compatible = "arm, non-volatile-counter";
H A Dtest_invalid_bracket.dtsi18 antirollback-counter = <&example_ctr>;
39 compatible = "arm, non-volatile-counter";
H A Dtest_invalid_missing_ctr.dtsi20 antirollback-counter = <&example_ctr>;
42 compatible = "arm, non-volatile-counter";
H A Dtest2.dtsi25 antirollback-counter = <&example_ctr>;
51 compatible = "arm, non-volatile-counter";
H A Dtest.dtsi21 antirollback-counter = <&example_ctr>;
43 compatible = "arm, non-volatile-counter";
/rk3399_ARM-atf/drivers/mentor/i2c/
H A Dmi2cv.c490 uint32_t counter = 0; in i2c_read() local
499 counter); in i2c_read()
505 if (counter > 0) in i2c_read()
507 counter++; in i2c_read()
538 } while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT)); in i2c_read()
540 if (counter == I2C_MAX_RETRY_CNT) { in i2c_read()
569 uint32_t counter = 0; in i2c_write() local
578 if (counter > 0) in i2c_write()
580 counter++; in i2c_write()
604 } while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT)); in i2c_write()
[all …]
/rk3399_ARM-atf/docs/perf/
H A Dperformance-monitoring-unit.rst7 This document gives an overview of the PMU counter configuration to assist with
22 - A dedicated cycle counter: ``PMCCNTR``.
46 Each programmable counter has an associated register, ``PMEVTYPER<n>`` which
47 configures it. The cycle counter has the ``PMCCFILTR_EL0`` register, which has
119 - Setting bit ``P[n]`` to ``1`` enables counter ``PMEVCNTR<n>``.
121 In other words, the counter will not increment at any privilege level or
127 - If set to ``1`` enables the cycle counter ``PMCCNTR``.
134 - If set to ``1`` it disables the cycle counter ``PMCCNTR`` where event
H A Dpsci-performance-methodology.rst35 (unquantified) overhead on the results. PMF uses the generic counter for
H A Dpsci-performance-instr.rst103 implementation to be calculated, given the frequency counter.
/rk3399_ARM-atf/docs/components/
H A Dcot-binding.rst83 - antirollback-counter
88 counter and it is an optional property.
91 counter sub-node present in 'non-volatile counters' node.
141 antirollback-counter = <&trusted_nv_ctr>;
155 antirollback-counter = <&trusted_nv_ctr>;
247 non-volatile counter node binding definition
260 Definition: must be "arm, non-volatile-counter"
270 of non-volatile counter register
285 Usage: Required for every nv-counter with unique id.
292 Register base address of non-volatile counter and it is required
[all …]
/rk3399_ARM-atf/tools/cert_create/src/
H A Dext.c243 ASN1_INTEGER *counter; in ext_new_nvcounter() local
248 counter = ASN1_INTEGER_new(); in ext_new_nvcounter()
249 ASN1_INTEGER_set(counter, value); in ext_new_nvcounter()
250 sz = i2d_ASN1_INTEGER(counter, &p); in ext_new_nvcounter()
257 ASN1_INTEGER_free(counter); in ext_new_nvcounter()
/rk3399_ARM-atf/plat/amd/versal2/
H A Dplat_psci_pm.c198 uint32_t index = 0, counter = 0; in versal2_validate_ns_entrypoint() local
200 rmr = get_reserved_entries_fdt(&counter); in versal2_validate_ns_entrypoint()
204 if (counter != 0) { in versal2_validate_ns_entrypoint()
205 while (index < counter) { in versal2_validate_ns_entrypoint()
/rk3399_ARM-atf/docs/process/
H A Dsecurity-hardening.rst85 - ``SCCD`` for the cycle counter.
92 - Prohibit general event counters and the cycle counter:
109 - Prohibit cycle counter: ``MDCR_EL3.SPME == 0 && PMCR_EL0.DP == 1``.
115 - Prohibit cycle counter: ``MDCR_EL3.SCCD == 1``
H A Dmisra-compliance.csv67 66,R,10.1,MISRA C 2012,Required,Yes,Optional,Fixing existing code may be counter-productive and int…
69 68,R,10.3,MISRA C 2012,Required,Yes,Optional,Fixing existing code may be counter-productive and int…
70 69,R,10.4,MISRA C 2012,Required,Yes,Optional,Fixing existing code may be counter-productive and int…
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-5.rst32 bit is set to zero, the cycle counter (when enabled) counts during secure world
H A Dsecurity-advisory-tfv-10.rst118 3. Retrieving the security counter value from an X.509 certificate to protect
131 - The platform uses a custom chain of trust which uses the non-volatile counter
/rk3399_ARM-atf/docs/
H A Dglossary.rst20 that exposes CPU core runtime metrics as a set of counter registers.
/rk3399_ARM-atf/docs/plat/st/
H A Dstm32mp1.rst97 - | ``STM32_TF_VERSION``: to manage BL2 monotonic counter.

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