1*b1af2676SHarrison MutaiRuntime Instrumentation Methodology 2*b1af2676SHarrison Mutai=================================== 3*b1af2676SHarrison Mutai 4*b1af2676SHarrison MutaiThis document outlines steps for undertaking performance measurements of key 5*b1af2676SHarrison Mutaioperations in the Trusted Firmware-A Power State Coordination Interface (PSCI) 6*b1af2676SHarrison Mutaiimplementation, using the in-built Performance Measurement Framework (PMF) and 7*b1af2676SHarrison Mutairuntime instrumentation timestamps. 8*b1af2676SHarrison Mutai 9*b1af2676SHarrison MutaiFramework 10*b1af2676SHarrison Mutai~~~~~~~~~ 11*b1af2676SHarrison Mutai 12*b1af2676SHarrison MutaiThe tests are based on the ``runtime-instrumentation`` test suite provided by 13*b1af2676SHarrison Mutaithe Trusted Firmware Test Framework (TFTF). The release build of this framework 14*b1af2676SHarrison Mutaiwas used because the results in the debug build became skewed; the console 15*b1af2676SHarrison Mutaioutput prevented some of the tests from executing in parallel. 16*b1af2676SHarrison Mutai 17*b1af2676SHarrison MutaiThe tests consist of both parallel and sequential tests, which are broadly 18*b1af2676SHarrison Mutaidescribed as follows: 19*b1af2676SHarrison Mutai 20*b1af2676SHarrison Mutai- **Parallel Tests** This type of test powers on all the non-lead CPUs and 21*b1af2676SHarrison Mutai brings them and the lead CPU to a common synchronization point. The lead CPU 22*b1af2676SHarrison Mutai then initiates the test on all CPUs in parallel. 23*b1af2676SHarrison Mutai 24*b1af2676SHarrison Mutai- **Sequential Tests** This type of test powers on each non-lead CPU in 25*b1af2676SHarrison Mutai sequence. The lead CPU initiates the test on a non-lead CPU then waits for the 26*b1af2676SHarrison Mutai test to complete before proceeding to the next non-lead CPU. The lead CPU then 27*b1af2676SHarrison Mutai executes the test on itself. 28*b1af2676SHarrison Mutai 29*b1af2676SHarrison MutaiNote there is very little variance observed in the values given (~1us), although 30*b1af2676SHarrison Mutaithe values for each CPU are sometimes interchanged, depending on the order in 31*b1af2676SHarrison Mutaiwhich locks are acquired. Also, there is very little variance observed between 32*b1af2676SHarrison Mutaiexecuting the tests sequentially in a single boot or rebooting between tests. 33*b1af2676SHarrison Mutai 34*b1af2676SHarrison MutaiGiven that runtime instrumentation using PMF is invasive, there is a small 35*b1af2676SHarrison Mutai(unquantified) overhead on the results. PMF uses the generic counter for 36*b1af2676SHarrison Mutaitimestamps, which runs at 50MHz on Juno. 37*b1af2676SHarrison Mutai 38*b1af2676SHarrison MutaiMetrics 39*b1af2676SHarrison Mutai~~~~~~~ 40*b1af2676SHarrison Mutai 41*b1af2676SHarrison Mutai.. glossary:: 42*b1af2676SHarrison Mutai 43*b1af2676SHarrison Mutai Powerdown Latency 44*b1af2676SHarrison Mutai Time taken from entering the TF PSCI implementation to the point the hardware 45*b1af2676SHarrison Mutai enters the low power state (WFI). Referring to the TF runtime instrumentation points, this 46*b1af2676SHarrison Mutai corresponds to: ``(RT_INSTR_ENTER_HW_LOW_PWR - RT_INSTR_ENTER_PSCI)``. 47*b1af2676SHarrison Mutai 48*b1af2676SHarrison Mutai Wakeup Latency 49*b1af2676SHarrison Mutai Time taken from the point the hardware exits the low power state to exiting 50*b1af2676SHarrison Mutai the TF PSCI implementation. This corresponds to: ``(RT_INSTR_EXIT_PSCI - 51*b1af2676SHarrison Mutai RT_INSTR_EXIT_HW_LOW_PWR)``. 52*b1af2676SHarrison Mutai 53*b1af2676SHarrison Mutai Cache Flush Latency 54*b1af2676SHarrison Mutai Time taken to flush the caches during powerdown. This corresponds to: 55*b1af2676SHarrison Mutai ``(RT_INSTR_EXIT_CFLUSH - RT_INSTR_ENTER_CFLUSH)``. 56