Home
last modified time | relevance | path

Searched refs:V2M_FLASH0_BASE (Results 1 – 18 of 18) sorted by relevance

/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd2/
H A Dnrd_plat_arm_def2.h301 #define V2M_FLASH0_BASE NRD_ROS_SMC0_BASE macro
305 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
308 #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
311 #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
356 V2M_FLASH0_BASE, \
362 V2M_FLASH0_BASE, \
H A Dnrd_ros_fw_def2.h63 V2M_FLASH0_BASE, \
/rk3399_ARM-atf/include/plat/arm/board/common/
H A Dv2m_def.h80 #define V2M_FLASH0_BASE (V2M_OFFSET + UL(0x08000000)) macro
124 #define V2M_MAP_FLASH0_RW MAP_REGION_FLAT(V2M_FLASH0_BASE,\
128 #define V2M_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
156 V2M_FLASH0_BASE, \
H A Dboard_css_def.h47 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
60 #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
/rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rd1ae/include/
H A Dplatform_def.h105 #define V2M_FLASH0_BASE UL(0x08000000) macro
108 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
115 #define RD1AE_EXTERNAL_FLASH MAP_REGION_FLAT(V2M_FLASH0_BASE, \
160 #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
/rk3399_ARM-atf/plat/arm/board/tc/include/
H A Dplatform_def.h230 #undef V2M_FLASH0_BASE
243 #define V2M_FLASH0_BASE UL(0xB0000000) macro
245 #define V2M_FLASH0_BASE UL(0x0C000000) macro
258 #define TC_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
317 #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
/rk3399_ARM-atf/plat/arm/board/juno/
H A Djuno_security.c94 #define V2M_FLASH0_SECURE_START (V2M_FLASH0_BASE + V2M_FLASH0_SIZE - 0x200000)
95 #define V2M_FLASH0_SECURE_END (V2M_FLASH0_BASE + V2M_FLASH0_SIZE - 1)
H A Djuno_def.h96 #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/
H A Dnrd_plat_arm_def3.h416 #define V2M_FLASH0_BASE NRD_ROS_SMC0_BASE macro
420 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
423 #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
426 #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
763 V2M_FLASH0_BASE, \
769 V2M_FLASH0_BASE, \
H A Dnrd_ros_fw_def3.h40 V2M_FLASH0_BASE, \
/rk3399_ARM-atf/plat/arm/board/fvp/
H A Dfvp_def.h191 #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
/rk3399_ARM-atf/plat/arm/board/juno/fdts/
H A Djuno_stmm_spmc_at_el3_manifest.dts32 #define STMM_FLASH0_BASE V2M_FLASH0_BASE
/rk3399_ARM-atf/plat/arm/board/fvp/include/
H A Dplatform_def.h395 #define PLAT_ARM_FLASH_IMAGE_BASE V2M_FLASH0_BASE
408 #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
/rk3399_ARM-atf/plat/arm/board/fvp/fdts/
H A Dfvp_stmm_spmc_at_el3_manifest.dts32 #define STMM_FLASH0_BASE V2M_FLASH0_BASE
H A Dfvp_stmm_rust_spmc_manifest.dts32 #define STMM_FLASH0_BASE V2M_FLASH0_BASE
/rk3399_ARM-atf/plat/arm/board/tc/fdts/
H A Dtc_spmc_manifest.dtsi120 reg = <0x0 V2M_FLASH0_BASE 0x0 V2M_FLASH0_SIZE>;
/rk3399_ARM-atf/plat/arm/board/corstone1000/common/include/
H A Dplatform_def.h173 #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
/rk3399_ARM-atf/plat/arm/board/juno/include/
H A Dplatform_def.h62 #define PLAT_ARM_TRUSTED_ROM_BASE (V2M_FLASH0_BASE + \