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5477fb37 |
| 29-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(fvp): add flash areas for secure partition" into integration
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9fb76763 |
| 16-May-2024 |
levi.yun <yeoreum.yun@arm.com> |
feat(fvp): add flash areas for secure partition
To support UEFI secure variable service, StandaloneMm which runs in BL32 should know flash areas. Add flash memory areas and system register region so
feat(fvp): add flash areas for secure partition
To support UEFI secure variable service, StandaloneMm which runs in BL32 should know flash areas. Add flash memory areas and system register region so that StandaloneMm access to flash storages.
Change-Id: I803bda9664a17a0b978ebff90974eaf5442a91cd Signed-off-by: levi.yun <yeoreum.yun@arm.com>
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a07c94b4 |
| 30-Sep-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "gm/reviewCI" into integration
* changes: docs: armv8-R aarch64 fvp_r documentation fvp_r: load, auth, and transfer from BL1 to BL33 chore: fvp_r: Initial No-EL3 and
Merge changes from topic "gm/reviewCI" into integration
* changes: docs: armv8-R aarch64 fvp_r documentation fvp_r: load, auth, and transfer from BL1 to BL33 chore: fvp_r: Initial No-EL3 and MPU Implementation fvp_r: initial platform port for fvp_r
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5fb061e7 |
| 27-Jan-2021 |
Gary Morrison <gary.morrison@arm.com> |
chore: fvp_r: Initial No-EL3 and MPU Implementation
For v8-R64, especially R82, creating code to run BL1 at EL2, using MPU.
Signed-off-by: Gary Morrison <gary.morrison@arm.com> Change-Id: I439ac39
chore: fvp_r: Initial No-EL3 and MPU Implementation
For v8-R64, especially R82, creating code to run BL1 at EL2, using MPU.
Signed-off-by: Gary Morrison <gary.morrison@arm.com> Change-Id: I439ac3915b982ad1e61d24365bdd1584b3070425
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83a2285e |
| 28-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1784 from antonio-nino-diaz-arm/an/includes-arm
plat/arm: Cleanup of includes and drivers
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bd9344f6 |
| 25-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Sanitise includes
Use full include paths like it is done for common includes.
This cleanup was started in commit d40e0e08283a ("Sanitise includes across codebase"), but it only cleaned co
plat/arm: Sanitise includes
Use full include paths like it is done for common includes.
This cleanup was started in commit d40e0e08283a ("Sanitise includes across codebase"), but it only cleaned common files and drivers. This patch does the same to Arm platforms.
Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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ebd17fa4 |
| 02-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1660 from antonio-nino-diaz-arm/an/misra
Several MISRA defect fixes
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f21c6321 |
| 30-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix types of constants in headers
Change-Id: I33eaee8e7c983b3042635a448cb8d689ea4e3a12 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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9aabd11a |
| 26-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1647 from antonio-nino-diaz-arm/an/setup-xlat
Improvements to setup page tables code
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03987d01 |
| 19-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platf
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms.
This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header.
The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2.
This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround).
Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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c6d1fe95 |
| 10-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1618 from satheesbalya-arm/sb1_2601_misra_smc_pwr
Fix misra warnings in SMC and power mgmt code
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e02f469f |
| 05-Oct-2018 |
Sathees Balya <sathees.balya@arm.com> |
Fix misra warnings in SMC and power mgmt code
Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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b51d4337 |
| 07-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1565 from satheesbalya-arm/sb1_2332_fwu_sds_register
juno: Revert FWU update detect mechanism
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4da6f6cd |
| 03-Sep-2018 |
Sathees Balya <sathees.balya@arm.com> |
juno: Revert FWU update detect mechanism
The patch 7b56928 unified the FWU mechanism on FVP and Juno platforms due to issues with MCC firmware not preserving the NVFLAGS. With MCCv150 firmware, this
juno: Revert FWU update detect mechanism
The patch 7b56928 unified the FWU mechanism on FVP and Juno platforms due to issues with MCC firmware not preserving the NVFLAGS. With MCCv150 firmware, this issue is resolved. Also writing to the NOR flash while executing from the same flash in Bypass mode had some stability issues. Hence, since the MCC firmware issue is resolved, this patch reverts to the NVFLAGS mechanism to detect FWU. Also, with the introduction of SDS (Shared Data Structure) by the SCP, the reset syndrome needs to queried from the appropriate SDS field.
Change-Id: If9c08f1afaaa4fcf197f3186887068103855f554 Signed-off-by: Sathees Balya <sathees.balya@arm.com> Signed-off-by: Soby Mathew <Soby.Mathew@arm.com>
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9500d5a4 |
| 09-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1148 from antonio-nino-diaz-arm/an/spm
Introduce Secure Partition Manager
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e29efeb1 |
| 09-Nov-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: FVP: Introduce port of SPM
This initial port of the Secure Partitions Manager to FVP supports BL31 in both SRAM and Trusted DRAM.
A document with instructions to build the SPM has been added.
SPM: FVP: Introduce port of SPM
This initial port of the Secure Partitions Manager to FVP supports BL31 in both SRAM and Trusted DRAM.
A document with instructions to build the SPM has been added.
Change-Id: I4ea83ff0a659be77f2cd72eaf2302cdf8ba98b32 Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Achin Gupta <achin.gupta@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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c64d1345 |
| 04-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1109 from robertovargas-arm/mem_protect
Mem protect
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f145403c |
| 03-Aug-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
mem_protect: Add mem_protect support in Juno and FVP for DRAM1
mem_protect needs some kind of non-volatile memory because it has to remember its state across reset and power down events. The most su
mem_protect: Add mem_protect support in Juno and FVP for DRAM1
mem_protect needs some kind of non-volatile memory because it has to remember its state across reset and power down events. The most suitable electronic part for this feature is a NVRAM which should be only accesible from the secure world. Juno and FVP lack such hardware and for this reason the MEM_PROTECT functionality is implemented with Flash EEPROM memory on both boards, even though this memory is accesible from the non-secure world. This is done only to show a full implementation of these PSCI features, but an actual system shouldn't use a non-secure NVRAM to implement it.
The EL3 runtime software will write the mem_protect flag and BL2 will read and clear the memory ranges if enabled. It is done in BL2 because it reduces the time that TF needs access to the full non-secure memory.
The memory layout of both boards is defined using macros which take different values in Juno and FVP platforms. Generic platform helpers are added that use the platform specific macros to generate a mem_region_t that is valid for the platform.
Change-Id: I2c6818ac091a2966fa07a52c5ddf8f6fde4941e9 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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0f22bef3 |
| 29-Apr-2017 |
Scott Branden <sbranden@users.noreply.github.com> |
Merge branch 'integration' into tf_issue_461
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228bfaba |
| 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #903 from antonio-nino-diaz-arm/an/build-xlat-v1
ARM platforms: Add option to use xlat tables lib v1
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3b211ff5 |
| 11-Apr-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
ARM platforms: Add option to use xlat tables lib v1
ARM platforms have migrated to the translation tables library v2. However, for testing purposes, it can be useful to temporarily switch back to th
ARM platforms: Add option to use xlat tables lib v1
ARM platforms have migrated to the translation tables library v2. However, for testing purposes, it can be useful to temporarily switch back to the old version.
This patch introduces the option `ARM_XLAT_TABLES_LIB_V1`, that switches to v1 of the library when is set to 1. By default, it is 0, so that ARM platforms use the new version unless specifically stated.
Updated User Guide.
Change-Id: I53d3c8dd97706f6af9c6fca0364a88ef341efd31 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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