| /rk3399_ARM-atf/docs/process/ |
| H A D | misra-compliance.csv | 19 18,R,1.1,MISRA C 2012,Required,Yes,Yes,
20 19,R,1.2,MISRA C 2012,Advisory,Yes,Optional,It bans __attribute__(()) and similar helpers.
21 20,R,1.3,MISRA C 2012,Required,N/A,Yes,
22 21,R,2.1,MISRA C 2012,Required,Yes,Yes,
23 22,R,2.2,MISRA C 2012,Required,Yes,Yes,
24 23,R,2.3,MISRA C 2012,Advisory,Yes,Optional,It prevents the usage of CASSERT().
25 24,R,2.4,MISRA C 2012,Advisory,No,No,Header files may use enumerations instead of defines to group …
26 25,R,2.5,MISRA C 2012,Advisory,No,No,We define many headers with macros that are unused in the proj…
27 26,R,2.6,MISRA C 2012,Advisory,Yes,Yes,
28 27,R,2.7,MISRA C 2012,Advisory,No,No,Doesn't allow for simple implementations of porting functions …
[all …]
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| /rk3399_ARM-atf/plat/imx/imx8ulp/upower/ |
| H A D | upmu.h | 19 vuint32_t R; member
29 vuint32_t R; member
40 vuint32_t R; member
50 vuint32_t R; member
67 vuint32_t R; member
82 vuint32_t R; member
98 vuint32_t R; member
114 vuint32_t R; member
130 vuint32_t R; member
141 vuint32_t R; member
[all …]
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| H A D | upower_api.c | 177 if ((mu_tx_pend != 0UL) && (mu->TSR.R == UPWR_MU_TSR_EMPTY)) { in upwr_txrx_isr()
180 mu->TCR.R = 0U; in upwr_txrx_isr()
190 if (mu->RSR.R != 0UL) { in upwr_txrx_isr()
192 mu->RCR.R = 0U; in upwr_txrx_isr()
508 mu->TCR.R = mu->RCR.R = 0U; in upwr_init()
567 while (mu->TSR.R != UPWR_MU_TSR_EMPTY) { in upwr_init()
638 mu->RCR.R = 1U; in upwr_init()
756 txmsg.word2 = config->R; in upwr_xcp_config()
1985 txmsg.word2 = param->R; /* just 1 word, so that's ok */ in upwr_pwm_param()
2947 return (upwr_alarm_t)(3U & (mu->FSR.R >> 1U)); /* FSR[2:1] */ in upwr_alarm_code()
[all …]
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| H A D | upower_soc_defs.h | 219 uint32_t R; member
302 uint32_t R; member
933 volatile uint32_t R; member
978 *cfg = mon_cfg.R; in set_mon_cfg()
1016 uint32_t R; member
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| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | trdc_config.h | 22 { 1, 1, SP(RW) | SU(R) | NP(RW) | NU(R) },
55 { 0, 1, SP(R) | SU(0) | NP(R) | NU(0) },
118 { 2, 1, SP(R) | SU(R) | NP(R) | NU(R) },
|
| /rk3399_ARM-atf/docs/plat/ |
| H A D | rcar-gen3.rst | 1 Renesas R-Car
4 "R-Car" is the nickname for Renesas' system-on-chip (SoC) family for
8 The scalable R-Car hardware platform and flexible software platform
13 Renesas R-Car Gen3 evaluation boards:
19 | R-Car H3 | - Salvator-X | - R-Car Starter Kit Premier |
22 | R-Car M3-W | - Salvator-X | |
23 | | - Salvator-XS | - R-Car Starter Kit Pro |
25 | R-Car M3-N | - Salvator-X | |
28 | R-Car V3M | - Eagle | - Starter Kit |
30 | R-Car V3H | - Condor | - Starter Kit |
[all …]
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| /rk3399_ARM-atf/drivers/arm/gic/v3/ |
| H A D | gicv3_private.h | 40 GICD_##REG##R + (uintptr_t)(id) : \
45 GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2) : \
51 GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 3) : \
57 (GICD_##REG##R + (uintptr_t)(id))
60 (GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2))
63 (GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 3))
117 GICR_##REG##R + (uintptr_t)(id) : \
118 GICR_##REG##R + (uintptr_t)(id) - (MIN_EPPI_ID - MIN_SPI_ID))
122 GICR_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2) : \
123 GICR_##REG##R + ((((uintptr_t)(id) - (MIN_EPPI_ID - MIN_SPI_ID))\
[all …]
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| /rk3399_ARM-atf/fdts/ |
| H A D | stm32mp15xx-dhcor-som.dtsi | 264 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
277 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
290 /* VCO = 600.0 MHz => P = 99, Q = 74, R = 99 */ /* @TOCHECK */
291 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
|
| H A D | stm32mp151a-prtt1a.dts | 147 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
160 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
173 /* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */
|
| H A D | stm32mp153c-lxa-fairytux2.dts | 63 /* VCO = 624 MHz => P = 208, Q = 48, R = 104 */
73 /* VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5 */
|
| H A D | stm32mp157c-lxa-tac.dts | 63 /* VCO = 624 MHz => P = 208, Q = 48, R = 104 */
73 /* VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5 */
|
| H A D | stm32mp15xx-osd32.dtsi | 261 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
274 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
287 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
|
| H A D | stm32mp157a-avenger96.dts | 251 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
264 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
277 /* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */
|
| H A D | stm32mp15xx-dkx.dtsi | 240 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
253 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
266 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
|
| H A D | stm32mp135f-dk.dts | 235 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 266, R = 533 (DDR) */
248 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 209 */
261 /* VCO = 600.0 MHz => P = 50, Q = 10, R = 100 */
|
| H A D | stm32mp157c-ed1.dts | 238 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
251 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
264 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
|
| H A D | stm32mp15xx-dhcom-som.dtsi | 269 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
282 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
295 /* VCO = 600.0 MHz => P = 50, Q = 50, R = 50 */
|
| H A D | stm32mp157c-odyssey-som.dtsi | 283 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
296 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
309 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
|
| /rk3399_ARM-atf/docs/components/ |
| H A D | realm-management-extension.rst | 85 TRP is a small test payload that runs at R-EL2 and implements a subset of
87 and the interface between R-EL2 and EL3. When building TF-A with RME enabled,
89 and uses it as the R-EL2 payload.
110 - R-EL2 (`RMM`_)
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| /rk3399_ARM-atf/plat/imx/imx8ulp/xrdc/ |
| H A D | xrdc_config.h | 16 #define R 4 macro
|
| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_memory_controller.c | 27 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) argument
|
| /rk3399_ARM-atf/plat/intel/soc/agilex/soc/ |
| H A D | agilex_memory_controller.c | 26 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) argument
|
| /rk3399_ARM-atf/plat/intel/soc/stratix10/soc/ |
| H A D | s10_memory_controller.c | 30 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) argument
|
| /rk3399_ARM-atf/docs/threat_model/firmware_threat_model/ |
| H A D | threat_model_arm_cca.rst | 125 malicious or faulty code running in the realm world, including R-EL2, R-EL1
126 and R-EL0 levels.
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| /rk3399_ARM-atf/include/drivers/nxp/trdc/ |
| H A D | imx_trdc.h | 52 #define R U(4) macro
|