Searched refs:IMX_IOMUX_GPR_BASE (Results 1 – 8 of 8) sorted by relevance
137 mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, 0x4c1); in bl31_early_platform_setup2()138 val = mmio_read_32(IMX_IOMUX_GPR_BASE + 0x2c); in bl31_early_platform_setup2()139 mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, val | 0x3DFF0000); in bl31_early_platform_setup2()
162 mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, 0x4E1); in bl31_early_platform_setup2()163 val = mmio_read_32(IMX_IOMUX_GPR_BASE + 0x2c); in bl31_early_platform_setup2()164 mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, val | 0x3DFF0000); in bl31_early_platform_setup2()
95 #define IMX_IOMUX_GPR_BASE U(0x30340000) macro
114 #define IMX_IOMUX_GPR_BASE U(0x30340000) macro
97 #define IMX_IOMUX_GPR_BASE U(0x30340000) macro
117 #define IMX_IOMUX_GPR_BASE U(0x30340000) macro
135 val = mmio_read_32(IMX_IOMUX_GPR_BASE + IOMUXC_GPR10); in bl31_tz380_setup()
405 mmio_setbits_32(IMX_IOMUX_GPR_BASE + 0x4, 1 << 12); in imx_gpc_init()