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Searched refs:EARLY_ERROR (Results 1 – 8 of 8) sorted by relevance

/rk3399_ARM-atf/include/common/
H A Ddebug.h102 #define EARLY_ERROR(...) ERROR(__VA_ARGS__) macro
104 #define EARLY_ERROR(...) no_tf_log(LOG_MARKER_ERROR __VA_ARGS__) macro
/rk3399_ARM-atf/plat/st/stm32mp2/
H A Dbl31_plat_setup.c56 EARLY_ERROR("%s: failed to open DT (%d)\n", __func__, ret); in bl31_early_platform_setup2()
62 EARLY_ERROR("%s: failed init clocks (%d)\n", __func__, ret); in bl31_early_platform_setup2()
H A Dbl2_plat_setup.c156 EARLY_ERROR("OTP probe failed\n"); in bl2_plat_arch_setup()
/rk3399_ARM-atf/drivers/st/bsec/
H A Dbsec2.c169 EARLY_ERROR("%s: DT not found\n", __func__); in bsec_late_init()
175 EARLY_ERROR("%s: BSEC node not found\n", __func__); in bsec_late_init()
235 EARLY_ERROR("%s: otp_invalid_mod\n", __func__); in bsec_probe()
245 EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id); in bsec_probe()
H A Dbsec3.c184 EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp2.c1783 EARLY_ERROR("Cannot set div on A35 bypass clock\n"); in stm32mp2_a35_ss_on_hsi()
1795 EARLY_ERROR("Cannot switch A35 to bypass clock\n"); in stm32mp2_a35_ss_on_hsi()
1841 EARLY_ERROR("PLL1 start failed @ 0x%lx: 0x%x\n", in stm32mp2_a35_pll1_start()
1857 EARLY_ERROR("CA35SS switch to PLL1 failed @ 0x%lx: 0x%x\n", in stm32mp2_a35_pll1_start()
2024 EARLY_ERROR("%s: %d\n", __func__, __LINE__); in _clk_stm32_pll1_init()
2048 EARLY_ERROR("PLL%d ref clock not started\n", pll->clk_id - _CK_PLL1 + 1); in clk_stm32_pll_wait_mux_ready()
2149 EARLY_ERROR("Pre divider status: %x\n", in wait_predivsr()
2177 EARLY_ERROR("Final divider status: %x\n", in wait_findivsr()
2196 EARLY_ERROR("XBAR%uCFGR: %x\n", channel, in wait_xbar_sts()
2358 EARLY_ERROR("Invalid rate %lu MHz for MSI ! (4 or 16 only)\n", in stm32_enable_oscillator_msi()
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H A Dstm32mp1_clk.c1629 EARLY_ERROR("%s: failed\n", __func__); in stm32mp1_lse_wait()
1638 EARLY_ERROR("%s: failed\n", __func__); in stm32mp1_lsi_set()
1656 EARLY_ERROR("%s: failed\n", __func__); in stm32mp1_hse_enable()
1675 EARLY_ERROR("%s: failed\n", __func__); in stm32mp1_csi_set()
1683 EARLY_ERROR("%s: failed\n", __func__); in stm32mp1_hsi_set()
1723 EARLY_ERROR("Invalid clk-hsi frequency\n"); in stm32mp1_hsidiv()
1825 EARLY_ERROR("PLL%u start failed @ 0x%lx: 0x%x\n", in stm32mp1_pll_output()
1854 EARLY_ERROR("PLL%u stop failed @ 0x%lx: 0x%x\n", in stm32mp1_pll_stop()
2393 EARLY_ERROR("forbidden new USB clk path\n"); in stm32mp1_clk_init()
2394 EARLY_ERROR("vs bootrom on USB boot\n"); in stm32mp1_clk_init()
H A Dclk-stm32mp13.c1094 EARLY_ERROR("HSIDIV failed @ 0x%lx: 0x%x\n", in stm32mp1_set_hsidiv()
1117 EARLY_ERROR("Invalid clk-hsi frequency\n"); in stm32mp1_hsidiv()
1359 EARLY_ERROR("Invalid Vref clock !\n"); in clk_stm32_pll_config_vco()