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Searched refs:stm32_rcc_base (Results 1 – 14 of 14) sorted by relevance

/optee_os/core/include/drivers/
H A Dstm32mp2_rcc_util.h14 vaddr_t stm32_rcc_base(void);
H A Dstm32mp1_rcc.h557 return io_read32(stm32_rcc_base() + RCC_TZCR) & RCC_TZCR_TZEN; in stm32_rcc_is_secure()
562 return io_read32(stm32_rcc_base() + RCC_TZCR) & RCC_TZCR_MCKPROT; in stm32_rcc_is_mckprot()
567 vaddr_t tzcr_reg = stm32_rcc_base() + RCC_TZCR; in stm32_rcc_set_mckprot()
H A Dstm32mp13_rcc.h1877 vaddr_t stm32_rcc_base(void);
/optee_os/core/drivers/rstctrl/
H A Dstm32mp1_rstctrl.c43 vaddr_t rcc_base = stm32_rcc_base(); in reset_assert()
88 vaddr_t rcc_base = stm32_rcc_base(); in reset_deassert()
H A Dstm32mp21_rstctrl.c24 vaddr_t address = stm32_rcc_base(); in stm32_reset_update()
H A Dstm32mp25_rstctrl.c24 vaddr_t address = stm32_rcc_base(); in stm32_reset_update()
/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c632 vaddr_t rcc_base = stm32_rcc_base(); in stm32mp1_clk_get_parent()
663 uint32_t selr = io_read32(stm32_rcc_base() + pll->rckxselr); in stm32mp1_pll_get_fref()
684 cfgr1 = io_read32(stm32_rcc_base() + pll->pllxcfgr1); in stm32mp1_pll_get_fvco()
685 fracr = io_read32(stm32_rcc_base() + pll->pllxfracr); in stm32mp1_pll_get_fvco()
726 cfgr2 = io_read32(stm32_rcc_base() + pll->pllxcfgr2); in stm32mp1_read_pll_freq()
738 vaddr_t rcc_base = stm32_rcc_base(); in get_clock_rate()
942 vaddr_t base = stm32_rcc_base(); in __clk_enable()
955 vaddr_t base = stm32_rcc_base(); in __clk_disable()
970 vaddr_t rcc_base = stm32_rcc_base(); in get_timer_rate()
1094 io_setbits32(stm32_rcc_base() + RCC_TZCR, RCC_TZCR_TZEN); in enable_rcc_tzen()
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H A Dclk-stm32mp21.c1254 pdata->rcc_base = stm32_rcc_base(); in stm32_clk_parse_fdt()
1630 uintptr_t rcc_base = stm32_rcc_base(); in wait_predivsr()
1654 uintptr_t rcc_base = stm32_rcc_base(); in wait_findivsr()
1678 uintptr_t rcc_base = stm32_rcc_base(); in wait_xbar_sts()
1731 uintptr_t rcc_base = stm32_rcc_base(); in flexclkgen_config_channel()
2378 uintptr_t rcc_base = stm32_rcc_base(); in clk_stm32_flexgen_set_rate()
3721 rc = clk_stm32_init(priv, stm32_rcc_base()); in stm32mp21_clk_probe()
H A Dclk-stm32mp25.c1272 pdata->rcc_base = stm32_rcc_base(); in stm32_clk_parse_fdt()
1634 uintptr_t rcc_base = stm32_rcc_base(); in wait_predivsr()
1658 uintptr_t rcc_base = stm32_rcc_base(); in wait_findivsr()
1682 uintptr_t rcc_base = stm32_rcc_base(); in wait_xbar_sts()
1735 uintptr_t rcc_base = stm32_rcc_base(); in flexclkgen_config_channel()
2406 uintptr_t rcc_base = stm32_rcc_base(); in clk_stm32_flexgen_set_rate()
3761 rc = clk_stm32_init(priv, stm32_rcc_base()); in stm32mp25_clk_probe()
H A Dclk-stm32mp13.c2730 res = clk_stm32_init(priv, stm32_rcc_base()); in stm32mp13_clk_probe()
/optee_os/core/arch/arm/plat-stm32mp1/
H A Dstm32_util.h40 vaddr_t stm32_rcc_base(void);
H A Dmain.c447 vaddr_t stm32_rcc_base(void) in stm32_rcc_base() function
/optee_os/core/arch/arm/plat-stm32mp2/
H A Dmain.c139 vaddr_t stm32_rcc_base(void) in stm32_rcc_base() function
/optee_os/core/arch/arm/plat-stm32mp1/pm/
H A Dpsci.c95 io_write32(stm32_rcc_base() + RCC_MP_GRSTCSETR, in stm32_pm_cpu_power_down_wfi()