| #
f406e0d7 |
| 07-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: upgrade to new interrupt framework
Moves plat-stm32mp1 to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Ca
plat-stm32mp1: upgrade to new interrupt framework
Moves plat-stm32mp1 to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
4f12f558 |
| 22-Aug-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: reset platform with reset controller device
Change platform stm32mp1 PSCI_SYSTEM_RESET implementation to rely on reset controller framework to proceed a full platform reset insead of
plat-stm32mp1: reset platform with reset controller device
Change platform stm32mp1 PSCI_SYSTEM_RESET implementation to rely on reset controller framework to proceed a full platform reset insead of a platform specific sequence. This change makes MP13 variants to now support PSCI system reset feature.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
37010ab7 |
| 07-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: use helper header file stm32mp_dt_bindings.h
Changes plat-stm32mp1 and its drivers to rely on stm32mp_dt_bindings.h which simplifies support of both variants STM32MP15 and STM32MP13 t
plat-stm32mp1: use helper header file stm32mp_dt_bindings.h
Changes plat-stm32mp1 and its drivers to rely on stm32mp_dt_bindings.h which simplifies support of both variants STM32MP15 and STM32MP13 that will use each specific DT bindings.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
488c73c0 |
| 08-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: clk: remove stm32_clock_*() helpers
Removes function that were deprecated: stm32_clock_is_enabled(), stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().
Signed-off-by:
drivers: clk: remove stm32_clock_*() helpers
Removes function that were deprecated: stm32_clock_is_enabled(), stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
1350576b |
| 02-Oct-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: disable RTCAPB clock when not needed
Disable RTCAPB clock when not used. The clock is currently needed when enabling or disabling the secondary code since this one reads secure entry
plat-stm32mp1: disable RTCAPB clock when not needed
Disable RTCAPB clock when not used. The clock is currently needed when enabling or disabling the secondary code since this one reads secure entry point address from a SoC interface relying on this clock.
Prior this change was RTCAPB clock enabled at boot time and never disabled. This change disables the clock when secondary core is brought to life and enables it back before secondary core enters its power down sequence.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| #
65401337 |
| 07-Jun-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove generic_ from generic_boot
Now that the CFG_GENERIC_BOOT configuration flag has been removed also remove "generic_" prefix from and in the related files.
Acked-by: Etienne Carriere <et
core: remove generic_ from generic_boot
Now that the CFG_GENERIC_BOOT configuration flag has been removed also remove "generic_" prefix from and in the related files.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
d1babea5 |
| 08-May-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: psci: support Arm SMCCC_VERSION function ID
As per Arm SMCCC v1.1 specification [1], PSCI PSCI_FEATURES function ID should report Arm Architecture Call SMCCC_VERSION as supported when
plat-stm32mp1: psci: support Arm SMCCC_VERSION function ID
As per Arm SMCCC v1.1 specification [1], PSCI PSCI_FEATURES function ID should report Arm Architecture Call SMCCC_VERSION as supported when the secure firmware supports both PSCI PSCI_FEATURES function ID and Arm SMCCC_VERSION function ID.
Link: [1] https://developer.arm.com/docs/den0028/latest Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
a8f0bfcf |
| 28-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: PSCI_SYSTEM_OFF support
Implement PSCI_SYSTEM_OFF command when STPMIC1 is used.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@foris
plat-stm32mp1: PSCI_SYSTEM_OFF support
Implement PSCI_SYSTEM_OFF command when STPMIC1 is used.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| #
2f5784ab |
| 28-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: PSCI_SYSTEM_RESET support
Use GRST control in RCC to reset the system on PCSI_RESET request. Any core can call this function.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro
plat-stm32mp1: PSCI_SYSTEM_RESET support
Use GRST control in RCC to reset the system on PCSI_RESET request. Any core can call this function.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| #
850b4772 |
| 28-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: fix PSCI_CPU_OFF support
Fix platform psci_features() to report PSCI_CPU_OFF support not only PSCI_CPU_ON when CFG_TEE_CORE_NB_CORE > 1.
This change also modifies CFG_TEE_CORE_NB_COR
plat-stm32mp1: fix PSCI_CPU_OFF support
Fix platform psci_features() to report PSCI_CPU_OFF support not only PSCI_CPU_ON when CFG_TEE_CORE_NB_CORE > 1.
This change also modifies CFG_TEE_CORE_NB_CORE handling for checkpatch issue so that both CPU_ON/CPU_OFF support are bound to number of core.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| #
10e1dc35 |
| 15-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32mp1: make all local variables be initialized
Update platform to conform with OP-TEE directive about local variables initialization.
Also rename variable labels excep into exceptions as more ex
stm32mp1: make all local variables be initialized
Update platform to conform with OP-TEE directive about local variables initialization.
Also rename variable labels excep into exceptions as more explicit.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
3f66fc74 |
| 14-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32mp1: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed
stm32mp1: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
b148ed09 |
| 17-Dec-2018 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: psci: switch secondary boot cpu offline
Secondary boot core can be switched OFF from a functional view by being reset. To get the core back on line, it shall be woken through catching secu
stm32mp1: psci: switch secondary boot cpu offline
Secondary boot core can be switched OFF from a functional view by being reset. To get the core back on line, it shall be woken through catching secure SGI0 interrupt then proceeding to same sequence as when getting the core online from a cold reset.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
b9c19263 |
| 17-Dec-2018 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: stm32mp_bkpreg() returns the backup register address
Rename bckreg_address() into stm32mp_bkpreg()to get the address of the 32bit backup register specified by ID defined in boot_api.h.
Si
stm32mp1: stm32mp_bkpreg() returns the backup register address
Rename bckreg_address() into stm32mp_bkpreg()to get the address of the 32bit backup register specified by ID defined in boot_api.h.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
00707ccc |
| 17-Dec-2018 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: psci: implement affinity_info
This change implements PSCI_AFFINITY_INFO for platform stm32mp1. The cores state are saved in a local array and accessed with SMP locking protection. Note the
stm32mp1: psci: implement affinity_info
This change implements PSCI_AFFINITY_INFO for platform stm32mp1. The cores state are saved in a local array and accessed with SMP locking protection. Note these do not lock/unlock if executed with the MMU disabled.
CPU shall call stm32mp_register_online_cpu() when online in the secure world. GIC CPU interface initialization is used to register online primary and secondary boot cores.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
0323f7b8 |
| 17-Dec-2018 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: move PSCI in pm/psci.c
Source file pm/psci.c will soon hold several PSCI functions and sequences. Move now the existing PSCI_CPU_ON support to pm/psci.c.
Signed-off-by: Etienne Carriere <
stm32mp1: move PSCI in pm/psci.c
Source file pm/psci.c will soon hold several PSCI functions and sequences. Move now the existing PSCI_CPU_ON support to pm/psci.c.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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