Home
last modified time | relevance | path

Searched refs:enable (Results 1 – 25 of 83) sorted by relevance

1234

/optee_os/core/drivers/crypto/caam/hal/imx_6_7/
H A Dhal_clk_mx6.c12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
24 if (enable) in caam_hal_clk_enable()
36 if (enable) in caam_hal_clk_enable()
H A Dhal_clk_mx7ulp.c12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
17 if (enable) in caam_hal_clk_enable()
H A Dhal_clk_mx7.c12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
16 if (enable) { in caam_hal_clk_enable()
/optee_os/core/drivers/crypto/caam/hal/imx_8ulp/
H A Dhal_clk.c12 void caam_hal_clk_enable(bool enable) in caam_hal_clk_enable() argument
17 if (enable) in caam_hal_clk_enable()
/optee_os/core/arch/arm/plat-stm32mp1/drivers/
H A Dstm32mp1_syscfg.h39 void stm32mp_set_vddsd_comp_state(enum stm32mp13_vddsd_comp_id id, bool enable);
46 void stm32mp_set_hslv_state(enum stm32mp13_hslv_id id, bool enable);
H A Dstm32mp1_syscfg.c164 void stm32mp_set_vddsd_comp_state(enum stm32mp13_vddsd_comp_id id, bool enable) in stm32mp_set_vddsd_comp_state() argument
182 if (enable) in stm32mp_set_vddsd_comp_state()
191 void stm32mp_set_hslv_state(enum stm32mp13_hslv_id id, bool enable) in stm32mp_set_hslv_state() argument
201 if (enable) in stm32mp_set_hslv_state()
212 if (enable != hlvs_value) in stm32mp_set_hslv_state()
H A Dstm32mp1_pwr.c70 void stm32mp1_pwr_regulator_set_state(enum pwr_regulator id, bool enable) in stm32mp1_pwr_regulator_set_state() argument
77 if (enable) { in stm32mp1_pwr_regulator_set_state()
104 bool enable) in stm32mp1_pwr_regu_set_state() argument
111 if (enable) { in stm32mp1_pwr_regu_set_state()
H A Dstm32mp1_pwr.h46 void stm32mp1_pwr_regulator_set_state(enum pwr_regulator id, bool enable);
/optee_os/core/include/drivers/
H A Datmel_rstc.h23 void sam_rstc_usb_por(unsigned char id, bool enable);
33 bool enable __unused) {} in sam_rstc_usb_por()
H A Drtc.h112 TEE_Result (*enable_alarm)(struct rtc *rtc, bool enable);
255 static inline TEE_Result rtc_enable_alarm(bool enable) in rtc_enable_alarm() argument
260 return rtc_device->ops->enable_alarm(rtc_device, enable); in rtc_enable_alarm()
359 static inline TEE_Result rtc_enable_alarm(bool enable __unused) in rtc_enable_alarm()
/optee_os/core/drivers/pm/imx/
H A Dgpcv2.c23 static void imx_gpcv2_set_core_pgc(bool enable, uint32_t offset) in imx_gpcv2_set_core_pgc() argument
27 if (enable) in imx_gpcv2_set_core_pgc()
/optee_os/core/drivers/clk/
H A Dclk-stm32-core.c65 static void stm32_gate_endisable(uint16_t gate_id, bool enable) in stm32_gate_endisable() argument
71 if (enable) { in stm32_gate_endisable()
90 void stm32_gate_set_init_state(uint16_t gate_id, bool enable) in stm32_gate_set_init_state() argument
95 stm32_gate_endisable(gate_id, enable); in stm32_gate_set_init_state()
152 static TEE_Result stm32_gate_ready_endisable(uint16_t gate_id, bool enable, in stm32_gate_ready_endisable() argument
157 stm32_gate_endisable(gate_id, enable); in stm32_gate_ready_endisable()
160 res = stm32_gate_wait_ready(gate_id + 1, enable); in stm32_gate_ready_endisable()
162 stm32_gate_endisable(gate_id, !enable); in stm32_gate_ready_endisable()
163 if (stm32_gate_wait_ready(gate_id + 1, !enable)) in stm32_gate_ready_endisable()
389 .enable = clk_stm32_gate_enable,
[all …]
/optee_os/core/drivers/crypto/caam/hal/imx_8q/
H A Dhal_clk.c8 void caam_hal_clk_enable(bool enable __unused) in caam_hal_clk_enable()
/optee_os/core/drivers/crypto/caam/hal/ls/
H A Dhal_clk.c10 void caam_hal_clk_enable(bool enable __unused) in caam_hal_clk_enable()
/optee_os/core/drivers/crypto/caam/hal/imx_8m/
H A Dhal_clk.c10 void caam_hal_clk_enable(bool enable __unused) in caam_hal_clk_enable()
/optee_os/core/drivers/crypto/caam/include/
H A Dcaam_hal_clk.h17 void caam_hal_clk_enable(bool enable);
/optee_os/core/drivers/clk/sam/
H A Dat91_utmi.c103 .enable = clk_utmi_enable,
183 .enable = clk_utmi_sama7g5_prepare,
H A Dclk-sam9x60-pll.c269 .enable = sam9x60_frac_pll_prepare,
277 bool enable) in sam9x60_div_pll_set_div() argument
280 uint32_t enable_mask = enable ? core->layout->endiv_mask : 0; in sam9x60_div_pll_set_div()
281 uint32_t ena_val = enable ? BIT(core->layout->endiv_shift) : 0; in sam9x60_div_pll_set_div()
395 .enable = sam9x60_div_pll_prepare,
402 .enable = sam9x60_div_pll_prepare,
/optee_os/core/arch/arm/dts/
H A Dstm32mp253.dtsi14 enable-method = "psci";
H A Dstm32mp233.dtsi15 enable-method = "psci";
H A Dstm32mp157c-ev1.dts297 /* spare dmas for other usage (un-delete to enable pwm capture) */
375 st,enable-fs-rftime-tuning;
376 st,enable-hs-rftime-reduction;
386 st,enable-fs-rftime-tuning;
387 st,enable-hs-rftime-reduction;
/optee_os/core/drivers/regulator/
H A Dstm32mp13_regulator_iod.c80 static TEE_Result iod_set_state(struct regulator *regu, bool enable) in iod_set_state() argument
85 FMSG("%s: set state %u", regulator_name(regu), enable); in iod_set_state()
87 if (enable) { in iod_set_state()
/optee_os/core/
H A Dcrypto.mk96 $(eval $(call cryp-enable-all-depends,CFG_WITH_SOFTWARE_PRNG, AES ECB SHA256))
159 cryp-enable-all-depends = $(call cfg-enable-all-depends,$(strip $(1)),$(foreach v,$(2),CFG_CRYPTO_$…
160 $(eval $(call cryp-enable-all-depends,CFG_REE_FS, AES ECB CTR HMAC SHA256 GCM))
161 $(eval $(call cryp-enable-all-depends,CFG_RPMB_FS, AES ECB CTR HMAC SHA256 GCM))
/optee_os/core/drivers/
H A Dsp805_wdt.c46 static void sp805_config(struct wdt_chip *chip, bool enable) in sp805_config() argument
56 if (enable) in sp805_config()
H A Dstpmic1.c881 int stpmic1_lp_reg_on_off(const char *name, uint8_t enable) in stpmic1_lp_reg_on_off() argument
888 return stpmic1_register_update(regul->low_power_reg, enable, in stpmic1_lp_reg_on_off()
892 int stpmic1_lp_on_off_unpg(struct stpmic1_lp_cfg *cfg, int enable) in stpmic1_lp_on_off_unpg() argument
894 assert(cfg->lp_reg && (enable == 0 || enable == 1)); in stpmic1_lp_on_off_unpg()
896 return stpmic1_register_update(cfg->lp_reg, enable, in stpmic1_lp_on_off_unpg()

1234